cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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omap-hdq.txt (535B)

      1* OMAP HDQ One wire bus master controller
      2
      3Required properties:
      4- compatible : should be "ti,omap3-1w" or "ti,am4372-hdq"
      5- reg : Address and length of the register set for the device
      6- interrupts : interrupt line.
      7- ti,hwmods : "hdq1w"
      8
      9Optional properties:
     10- ti,mode: should be "hdq": HDQ mode  "1w": one-wire mode.
     11	   If not specified HDQ mode is implied.
     12
     13Example:
     14
     15- From omap3.dtsi
     16  hdqw1w: 1w@480b2000 {
     17	compatible = "ti,omap3-1w";
     18	reg = <0x480b2000 0x1000>;
     19	interrupts = <58>;
     20	ti,hwmods = "hdq1w";
     21	ti,mode = "hdq";
     22  };