cpia2_devel.rst (2847B)
1.. SPDX-License-Identifier: GPL-2.0 2 3The cpia2 driver 4================ 5 6Authors: Peter Pregler <Peter_Pregler@email.com>, 7Scott J. Bertin <scottbertin@yahoo.com>, and 8Jarl Totland <Jarl.Totland@bdc.no> for the original cpia driver, which 9this one was modelled from. 10 11 12Notes to developers 13~~~~~~~~~~~~~~~~~~~ 14 15 - This is a driver version stripped of the 2.4 back compatibility 16 and old MJPEG ioctl API. See cpia2.sf.net for 2.4 support. 17 18Programmer's overview of cpia2 driver 19~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 20 21Cpia2 is the second generation video coprocessor from VLSI Vision Ltd (now a 22division of ST Microelectronics). There are two versions. The first is the 23STV0672, which is capable of up to 30 frames per second (fps) in frame sizes 24up to CIF, and 15 fps for VGA frames. The STV0676 is an improved version, 25which can handle up to 30 fps VGA. Both coprocessors can be attached to two 26CMOS sensors - the vvl6410 CIF sensor and the vvl6500 VGA sensor. These will 27be referred to as the 410 and the 500 sensors, or the CIF and VGA sensors. 28 29The two chipsets operate almost identically. The core is an 8051 processor, 30running two different versions of firmware. The 672 runs the VP4 video 31processor code, the 676 runs VP5. There are a few differences in register 32mappings for the two chips. In these cases, the symbols defined in the 33header files are marked with VP4 or VP5 as part of the symbol name. 34 35The cameras appear externally as three sets of registers. Setting register 36values is the only way to control the camera. Some settings are 37interdependant, such as the sequence required to power up the camera. I will 38try to make note of all of these cases. 39 40The register sets are called blocks. Block 0 is the system block. This 41section is always powered on when the camera is plugged in. It contains 42registers that control housekeeping functions such as powering up the video 43processor. The video processor is the VP block. These registers control 44how the video from the sensor is processed. Examples are timing registers, 45user mode (vga, qvga), scaling, cropping, framerates, and so on. The last 46block is the video compressor (VC). The video stream sent from the camera is 47compressed as Motion JPEG (JPEGA). The VC controls all of the compression 48parameters. Looking at the file cpia2_registers.h, you can get a full view 49of these registers and the possible values for most of them. 50 51One or more registers can be set or read by sending a usb control message to 52the camera. There are three modes for this. Block mode requests a number 53of contiguous registers. Random mode reads or writes random registers with 54a tuple structure containing address/value pairs. The repeat mode is only 55used by VP4 to load a firmware patch. It contains a starting address and 56a sequence of bytes to be written into a gpio port.