cx88-devel.rst (3191B)
1.. SPDX-License-Identifier: GPL-2.0 2 3The cx88 driver 4=============== 5 6Author: Gerd Hoffmann 7 8Documentation missing at the cx88 datasheet 9------------------------------------------- 10 11MO_OUTPUT_FORMAT (0x310164) 12 13.. code-block:: none 14 15 Previous default from DScaler: 0x1c1f0008 16 Digit 8: 31-28 17 28: PREVREMOD = 1 18 19 Digit 7: 27-24 (0xc = 12 = b1100 ) 20 27: COMBALT = 1 21 26: PAL_INV_PHASE 22 (DScaler apparently set this to 1, resulted in sucky picture) 23 24 Digits 6,5: 23-16 25 25-16: COMB_RANGE = 0x1f [default] (9 bits -> max 512) 26 27 Digit 4: 15-12 28 15: DISIFX = 0 29 14: INVCBF = 0 30 13: DISADAPT = 0 31 12: NARROWADAPT = 0 32 33 Digit 3: 11-8 34 11: FORCE2H 35 10: FORCEREMD 36 9: NCHROMAEN 37 8: NREMODEN 38 39 Digit 2: 7-4 40 7-6: YCORE 41 5-4: CCORE 42 43 Digit 1: 3-0 44 3: RANGE = 1 45 2: HACTEXT 46 1: HSFMT 47 480x47 is the sync byte for MPEG-2 transport stream packets. 49Datasheet incorrectly states to use 47 decimal. 188 is the length. 50All DVB compliant frontends output packets with this start code. 51 52Hauppauge WinTV cx88 IR information 53----------------------------------- 54 55The controls for the mux are GPIO [0,1] for source, and GPIO 2 for muting. 56 57====== ======== ================================================= 58GPIO0 GPIO1 59====== ======== ================================================= 60 0 0 TV Audio 61 1 0 FM radio 62 0 1 Line-In 63 1 1 Mono tuner bypass or CD passthru (tuner specific) 64====== ======== ================================================= 65 66GPIO 16(I believe) is tied to the IR port (if present). 67 68 69From the data sheet: 70 71- Register 24'h20004 PCI Interrupt Status 72 73 - bit [18] IR_SMP_INT Set when 32 input samples have been collected over 74 - gpio[16] pin into GP_SAMPLE register. 75 76What's missing from the data sheet: 77 78- Setup 4KHz sampling rate (roughly 2x oversampled; good enough for our RC5 79 compat remote) 80- set register 0x35C050 to 0xa80a80 81- enable sampling 82- set register 0x35C054 to 0x5 83- enable the IRQ bit 18 in the interrupt mask register (and 84 provide for a handler) 85 86GP_SAMPLE register is at 0x35C058 87 88Bits are then right shifted into the GP_SAMPLE register at the specified 89rate; you get an interrupt when a full DWORD is received. 90You need to recover the actual RC5 bits out of the (oversampled) IR sensor 91bits. (Hint: look for the 0/1and 1/0 crossings of the RC5 bi-phase data) An 92actual raw RC5 code will span 2-3 DWORDS, depending on the actual alignment. 93 94I'm pretty sure when no IR signal is present the receiver is always in a 95marking state(1); but stray light, etc can cause intermittent noise values 96as well. Remember, this is a free running sample of the IR receiver state 97over time, so don't assume any sample starts at any particular place. 98 99Additional info 100~~~~~~~~~~~~~~~ 101 102This data sheet (google search) seems to have a lovely description of the 103RC5 basics: 104http://www.atmel.com/dyn/resources/prod_documents/doc2817.pdf 105 106This document has more data: 107http://www.nenya.be/beor/electronics/rc5.htm 108 109This document has a how to decode a bi-phase data stream: 110http://www.ee.washington.edu/circuit_archive/text/ir_decode.txt 111 112This document has still more info: 113http://www.xs4all.nl/~sbp/knowledge/ir/rc5.htm