cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

exynos_thermal.rst (2957B)


      1========================
      2Kernel driver exynos_tmu
      3========================
      4
      5Supported chips:
      6
      7* ARM Samsung Exynos4, Exynos5 series of SoC
      8
      9  Datasheet: Not publicly available
     10
     11Authors: Donggeun Kim <dg77.kim@samsung.com>
     12Authors: Amit Daniel <amit.daniel@samsung.com>
     13
     14TMU controller Description:
     15---------------------------
     16
     17This driver allows to read temperature inside Samsung Exynos4/5 series of SoC.
     18
     19The chip only exposes the measured 8-bit temperature code value
     20through a register.
     21Temperature can be taken from the temperature code.
     22There are three equations converting from temperature to temperature code.
     23
     24The three equations are:
     25  1. Two point trimming::
     26
     27	Tc = (T - 25) * (TI2 - TI1) / (85 - 25) + TI1
     28
     29  2. One point trimming::
     30
     31	Tc = T + TI1 - 25
     32
     33  3. No trimming::
     34
     35	Tc = T + 50
     36
     37  Tc:
     38       Temperature code, T: Temperature,
     39  TI1:
     40       Trimming info for 25 degree Celsius (stored at TRIMINFO register)
     41       Temperature code measured at 25 degree Celsius which is unchanged
     42  TI2:
     43       Trimming info for 85 degree Celsius (stored at TRIMINFO register)
     44       Temperature code measured at 85 degree Celsius which is unchanged
     45
     46TMU(Thermal Management Unit) in Exynos4/5 generates interrupt
     47when temperature exceeds pre-defined levels.
     48The maximum number of configurable threshold is five.
     49The threshold levels are defined as follows::
     50
     51  Level_0: current temperature > trigger_level_0 + threshold
     52  Level_1: current temperature > trigger_level_1 + threshold
     53  Level_2: current temperature > trigger_level_2 + threshold
     54  Level_3: current temperature > trigger_level_3 + threshold
     55
     56The threshold and each trigger_level are set
     57through the corresponding registers.
     58
     59When an interrupt occurs, this driver notify kernel thermal framework
     60with the function exynos_report_trigger.
     61Although an interrupt condition for level_0 can be set,
     62it can be used to synchronize the cooling action.
     63
     64TMU driver description:
     65-----------------------
     66
     67The exynos thermal driver is structured as::
     68
     69					Kernel Core thermal framework
     70				(thermal_core.c, step_wise.c, cpufreq_cooling.c)
     71								^
     72								|
     73								|
     74  TMU configuration data -----> TMU Driver  <----> Exynos Core thermal wrapper
     75  (exynos_tmu_data.c)	      (exynos_tmu.c)	   (exynos_thermal_common.c)
     76  (exynos_tmu_data.h)	      (exynos_tmu.h)	   (exynos_thermal_common.h)
     77
     78a) TMU configuration data:
     79		This consist of TMU register offsets/bitfields
     80		described through structure exynos_tmu_registers. Also several
     81		other platform data (struct exynos_tmu_platform_data) members
     82		are used to configure the TMU.
     83b) TMU driver:
     84		This component initialises the TMU controller and sets different
     85		thresholds. It invokes core thermal implementation with the call
     86		exynos_report_trigger.
     87c) Exynos Core thermal wrapper:
     88		This provides 3 wrapper function to use the
     89		Kernel core thermal framework. They are exynos_unregister_thermal,
     90		exynos_register_thermal and exynos_report_trigger.