cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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lpit.rst (1275B)


      1.. SPDX-License-Identifier: GPL-2.0
      2
      3===========================
      4Low Power Idle Table (LPIT)
      5===========================
      6
      7To enumerate platform Low Power Idle states, Intel platforms are using
      8“Low Power Idle Table” (LPIT). More details about this table can be
      9downloaded from:
     10https://www.uefi.org/sites/default/files/resources/Intel_ACPI_Low_Power_S0_Idle.pdf
     11
     12Residencies for each low power state can be read via FFH
     13(Function fixed hardware) or a memory mapped interface.
     14
     15On platforms supporting S0ix sleep states, there can be two types of
     16residencies:
     17
     18  - CPU PKG C10 (Read via FFH interface)
     19  - Platform Controller Hub (PCH) SLP_S0 (Read via memory mapped interface)
     20
     21The following attributes are added dynamically to the cpuidle
     22sysfs attribute group::
     23
     24  /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us
     25  /sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us
     26
     27The "low_power_idle_cpu_residency_us" attribute shows time spent
     28by the CPU package in PKG C10
     29
     30The "low_power_idle_system_residency_us" attribute shows SLP_S0
     31residency, or system time spent with the SLP_S0# signal asserted.
     32This is the lowest possible system power state, achieved only when CPU is in
     33PKG C10 and all functional blocks in PCH are in a low power state.