cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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i915_gem_lmem.rst (969B)


      1=========================
      2I915 DG1/LMEM RFC Section
      3=========================
      4
      5Upstream plan
      6=============
      7For upstream the overall plan for landing all the DG1 stuff and turning it for
      8real, with all the uAPI bits is:
      9
     10* Merge basic HW enabling of DG1(still without pciid)
     11* Merge the uAPI bits behind special CONFIG_BROKEN(or so) flag
     12        * At this point we can still make changes, but importantly this lets us
     13          start running IGTs which can utilize local-memory in CI
     14* Convert over to TTM, make sure it all keeps working. Some of the work items:
     15        * TTM shrinker for discrete
     16        * dma_resv_lockitem for full dma_resv_lock, i.e not just trylock
     17        * Use TTM CPU pagefault handler
     18        * Route shmem backend over to TTM SYSTEM for discrete
     19        * TTM purgeable object support
     20        * Move i915 buddy allocator over to TTM
     21* Send RFC(with mesa-dev on cc) for final sign off on the uAPI
     22* Add pciid for DG1 and turn on uAPI for real