cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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jc42.rst (4354B)

      1Kernel driver jc42
      2==================
      3
      4Supported chips:
      5
      6  * Analog Devices ADT7408
      7
      8    Datasheets:
      9
     10	https://www.analog.com/static/imported-files/data_sheets/ADT7408.pdf
     11
     12  * Atmel AT30TS00, AT30TS002A/B, AT30TSE004A
     13
     14    Datasheets:
     15
     16	http://www.atmel.com/Images/doc8585.pdf
     17
     18	http://www.atmel.com/Images/doc8711.pdf
     19
     20	http://www.atmel.com/Images/Atmel-8852-SEEPROM-AT30TSE002A-Datasheet.pdf
     21
     22	http://www.atmel.com/Images/Atmel-8868-DTS-AT30TSE004A-Datasheet.pdf
     23
     24  * IDT TSE2002B3, TSE2002GB2, TSE2004GB2, TS3000B3, TS3000GB0, TS3000GB2,
     25
     26	TS3001GB2
     27
     28    Datasheets:
     29
     30	Available from IDT web site
     31
     32  * Maxim MAX6604
     33
     34    Datasheets:
     35
     36	http://datasheets.maxim-ic.com/en/ds/MAX6604.pdf
     37
     38  * Microchip MCP9804, MCP9805, MCP9808, MCP98242, MCP98243, MCP98244, MCP9843
     39
     40    Datasheets:
     41
     42	https://ww1.microchip.com/downloads/en/DeviceDoc/22203C.pdf
     43
     44	https://ww1.microchip.com/downloads/en/DeviceDoc/21977b.pdf
     45
     46	https://ww1.microchip.com/downloads/en/DeviceDoc/25095A.pdf
     47
     48	https://ww1.microchip.com/downloads/en/DeviceDoc/21996a.pdf
     49
     50	https://ww1.microchip.com/downloads/en/DeviceDoc/22153c.pdf
     51
     52	https://ww1.microchip.com/downloads/en/DeviceDoc/22327A.pdf
     53
     54  * NXP Semiconductors SE97, SE97B, SE98, SE98A
     55
     56    Datasheets:
     57
     58	https://www.nxp.com/documents/data_sheet/SE97.pdf
     59
     60	https://www.nxp.com/documents/data_sheet/SE97B.pdf
     61
     62	https://www.nxp.com/documents/data_sheet/SE98.pdf
     63
     64	https://www.nxp.com/documents/data_sheet/SE98A.pdf
     65
     66  * ON Semiconductor CAT34TS02, CAT6095
     67
     68    Datasheet:
     69
     70	https://www.onsemi.com/pub_link/Collateral/CAT34TS02-D.PDF
     71
     72	https://www.onsemi.com/pub/Collateral/CAT6095-D.PDF
     73
     74  * ST Microelectronics STTS424, STTS424E02, STTS2002, STTS2004, STTS3000
     75
     76    Datasheets:
     77
     78	http://www.st.com/web/en/resource/technical/document/datasheet/CD00157556.pdf
     79
     80	http://www.st.com/web/en/resource/technical/document/datasheet/CD00157558.pdf
     81
     82	http://www.st.com/web/en/resource/technical/document/datasheet/CD00266638.pdf
     83
     84	http://www.st.com/web/en/resource/technical/document/datasheet/CD00225278.pdf
     85
     86	http://www.st.com/web/en/resource/technical/document/datasheet/DM00076709.pdf
     87
     88  * JEDEC JC 42.4 compliant temperature sensor chips
     89
     90    Datasheet:
     91
     92	http://www.jedec.org/sites/default/files/docs/4_01_04R19.pdf
     93
     94
     95  Common for all chips:
     96
     97    Prefix: 'jc42'
     98
     99    Addresses scanned: I2C 0x18 - 0x1f
    100
    101Author:
    102	Guenter Roeck <linux@roeck-us.net>
    103
    104
    105Description
    106-----------
    107
    108This driver implements support for JEDEC JC 42.4 compliant temperature sensors,
    109which are used on many DDR3 memory modules for mobile devices and servers. Some
    110systems use the sensor to prevent memory overheating by automatically throttling
    111the memory controller.
    112
    113The driver auto-detects the chips listed above, but can be manually instantiated
    114to support other JC 42.4 compliant chips.
    115
    116Example: the following will load the driver for a generic JC 42.4 compliant
    117temperature sensor at address 0x18 on I2C bus #1::
    118
    119	# modprobe jc42
    120	# echo jc42 0x18 > /sys/bus/i2c/devices/i2c-1/new_device
    121
    122A JC 42.4 compliant chip supports a single temperature sensor. Minimum, maximum,
    123and critical temperature can be configured. There are alarms for high, low,
    124and critical thresholds.
    125
    126There is also an hysteresis to control the thresholds for resetting alarms.
    127Per JC 42.4 specification, the hysteresis threshold can be configured to 0, 1.5,
    1283.0, and 6.0 degrees C. Configured hysteresis values will be rounded to those
    129limits. The chip supports only a single register to configure the hysteresis,
    130which applies to all limits. This register can be written by writing into
    131temp1_crit_hyst. Other hysteresis attributes are read-only.
    132
    133If the BIOS has configured the sensor for automatic temperature management, it
    134is likely that it has locked the registers, i.e., that the temperature limits
    135cannot be changed.
    136
    137Sysfs entries
    138-------------
    139
    140======================= ===========================================
    141temp1_input		Temperature (RO)
    142temp1_min		Minimum temperature (RO or RW)
    143temp1_max		Maximum temperature (RO or RW)
    144temp1_crit		Critical high temperature (RO or RW)
    145
    146temp1_crit_hyst		Critical hysteresis temperature (RO or RW)
    147temp1_max_hyst		Maximum hysteresis temperature (RO)
    148
    149temp1_min_alarm		Temperature low alarm
    150temp1_max_alarm		Temperature high alarm
    151temp1_crit_alarm	Temperature critical alarm
    152======================= ===========================================