cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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nsa320.rst (2137B)


      1Kernel driver nsa320_hwmon
      2==========================
      3
      4Supported chips:
      5
      6  * Holtek HT46R065 microcontroller with onboard firmware that configures
      7
      8	it to act as a hardware monitor.
      9
     10    Prefix: 'nsa320'
     11
     12    Addresses scanned: none
     13
     14    Datasheet: Not available, driver was reverse engineered based upon the
     15
     16	Zyxel kernel source
     17
     18
     19
     20Author:
     21
     22  Adam Baker <linux@baker-net.org.uk>
     23
     24Description
     25-----------
     26
     27This chip is known to be used in the Zyxel NSA320 and NSA325 NAS Units and
     28also in some variants of the NSA310 but the driver has only been tested
     29on the NSA320. In all of these devices it is connected to the same 3 GPIO
     30lines which are used to provide chip select, clock and data lines. The
     31interface behaves similarly to SPI but at much lower speeds than are normally
     32used for SPI.
     33
     34Following each chip select pulse the chip will generate a single 32 bit word
     35that contains 0x55 as a marker to indicate that data is being read correctly,
     36followed by an 8 bit fan speed in 100s of RPM and a 16 bit temperature in
     37tenths of a degree.
     38
     39
     40sysfs-Interface
     41---------------
     42
     43============= =================
     44temp1_input   temperature input
     45fan1_input    fan speed
     46============= =================
     47
     48Notes
     49-----
     50
     51The access timings used in the driver are the same as used in the Zyxel
     52provided kernel. Testing has shown that if the delay between chip select and
     53the first clock pulse is reduced from 100 ms to just under 10ms then the chip
     54will not produce any output. If the duration of either phase of the clock
     55is reduced from 100 us to less than 15 us then data pulses are likely to be
     56read twice corrupting the output. The above analysis is based upon a sample
     57of one unit but suggests that the Zyxel provided delay values include a
     58reasonable tolerance.
     59
     60The driver incorporates a limit that it will not check for updated values
     61faster than once a second. This is because the hardware takes a relatively long
     62time to read the data from the device and when it does it reads both temp and
     63fan speed. As the most likely case for two accesses in quick succession is
     64to read both of these values avoiding a second read delay is desirable.