cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sbtsi_temp.rst (1558B)


      1.. SPDX-License-Identifier: GPL-2.0-or-later
      2
      3Kernel driver sbtsi_temp
      4========================
      5
      6Supported hardware:
      7
      8  * Sideband interface (SBI) Temperature Sensor Interface (SB-TSI)
      9    compliant AMD SoC temperature device.
     10
     11    Prefix: 'sbtsi_temp'
     12
     13    Addresses scanned: This driver doesn't support address scanning.
     14
     15    To instantiate this driver on an AMD CPU with SB-TSI
     16    support, the i2c bus number would be the bus connected from the board
     17    management controller (BMC) to the CPU. The i2c address is specified in
     18    Section 6.3.1 of the SoC register reference: The SB-TSI address is normally
     19    98h for socket 0 and 90h for socket 1, but it could vary based on hardware
     20    address select pins.
     21
     22    Datasheet: The SB-TSI interface and protocol is available as part of
     23               the open source SoC register reference at:
     24
     25	       https://www.amd.com/system/files/TechDocs/56255_OSRR.pdf
     26
     27               The Advanced Platform Management Link (APML) Specification is
     28               available at:
     29
     30	       http://developer.amd.com/wordpress/media/2012/10/41918.pdf
     31
     32Author: Kun Yi <kunyi@google.com>
     33
     34Description
     35-----------
     36
     37The SBI temperature sensor interface (SB-TSI) is an emulation of the software
     38and physical interface of a typical 8-pin remote temperature sensor (RTS) on
     39AMD SoCs. It implements one temperature sensor with readings and limit
     40registers encode the temperature in increments of 0.125 from 0 to 255.875.
     41Limits can be set through the writable thresholds, and if reached will trigger
     42corresponding alert signals.