cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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i2c-ismt.rst (1077B)


      1======================
      2Kernel driver i2c-ismt
      3======================
      4
      5
      6Supported adapters:
      7  * Intel S12xx series SOCs
      8
      9Authors:
     10	Bill Brown <bill.e.brown@intel.com>
     11
     12
     13Module Parameters
     14-----------------
     15
     16* bus_speed (unsigned int)
     17
     18Allows changing of the bus speed.  Normally, the bus speed is set by the BIOS
     19and never needs to be changed.  However, some SMBus analyzers are too slow for
     20monitoring the bus during debug, thus the need for this module parameter.
     21Specify the bus speed in kHz.
     22
     23Available bus frequency settings:
     24
     25  ====   =========
     26  0      no change
     27  80     kHz
     28  100    kHz
     29  400    kHz
     30  1000   kHz
     31  ====   =========
     32
     33
     34Description
     35-----------
     36
     37The S12xx series of SOCs have a pair of integrated SMBus 2.0 controllers
     38targeted primarily at the microserver and storage markets.
     39
     40The S12xx series contain a pair of PCI functions.  An output of lspci will show
     41something similar to the following::
     42
     43  00:13.0 System peripheral: Intel Corporation Centerton SMBus 2.0 Controller 0
     44  00:13.1 System peripheral: Intel Corporation Centerton SMBus 2.0 Controller 1