cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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i2c-piix4.rst (4922B)


      1=======================
      2Kernel driver i2c-piix4
      3=======================
      4
      5Supported adapters:
      6  * Intel 82371AB PIIX4 and PIIX4E
      7  * Intel 82443MX (440MX)
      8    Datasheet: Publicly available at the Intel website
      9  * ServerWorks OSB4, CSB5, CSB6, HT-1000 and HT-1100 southbridges
     10    Datasheet: Only available via NDA from ServerWorks
     11  * ATI IXP200, IXP300, IXP400, SB600, SB700 and SB800 southbridges
     12    Datasheet: Not publicly available
     13    SB700 register reference available at:
     14    http://support.amd.com/us/Embedded_TechDocs/43009_sb7xx_rrg_pub_1.00.pdf
     15  * AMD SP5100 (SB700 derivative found on some server mainboards)
     16    Datasheet: Publicly available at the AMD website
     17    http://support.amd.com/us/Embedded_TechDocs/44413.pdf
     18  * AMD Hudson-2, ML, CZ
     19    Datasheet: Not publicly available
     20  * Hygon CZ
     21    Datasheet: Not publicly available
     22  * Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge
     23    Datasheet: Publicly available at the SMSC website http://www.smsc.com
     24
     25Authors:
     26	- Frodo Looijaard <frodol@dds.nl>
     27	- Philip Edelbrock <phil@netroedge.com>
     28
     29
     30Module Parameters
     31-----------------
     32
     33* force: int
     34  Forcibly enable the PIIX4. DANGEROUS!
     35* force_addr: int
     36  Forcibly enable the PIIX4 at the given address. EXTREMELY DANGEROUS!
     37
     38
     39Description
     40-----------
     41
     42The PIIX4 (properly known as the 82371AB) is an Intel chip with a lot of
     43functionality. Among other things, it implements the PCI bus. One of its
     44minor functions is implementing a System Management Bus. This is a true
     45SMBus - you can not access it on I2C levels. The good news is that it
     46natively understands SMBus commands and you do not have to worry about
     47timing problems. The bad news is that non-SMBus devices connected to it can
     48confuse it mightily. Yes, this is known to happen...
     49
     50Do ``lspci -v`` and see whether it contains an entry like this::
     51
     52  0000:00:02.3 Bridge: Intel Corp. 82371AB/EB/MB PIIX4 ACPI (rev 02)
     53	       Flags: medium devsel, IRQ 9
     54
     55Bus and device numbers may differ, but the function number must be
     56identical (like many PCI devices, the PIIX4 incorporates a number of
     57different 'functions', which can be considered as separate devices). If you
     58find such an entry, you have a PIIX4 SMBus controller.
     59
     60On some computers (most notably, some Dells), the SMBus is disabled by
     61default. If you use the insmod parameter 'force=1', the kernel module will
     62try to enable it. THIS IS VERY DANGEROUS! If the BIOS did not set up a
     63correct address for this module, you could get in big trouble (read:
     64crashes, data corruption, etc.). Try this only as a last resort (try BIOS
     65updates first, for example), and backup first! An even more dangerous
     66option is 'force_addr=<IOPORT>'. This will not only enable the PIIX4 like
     67'force' foes, but it will also set a new base I/O port address. The SMBus
     68parts of the PIIX4 needs a range of 8 of these addresses to function
     69correctly. If these addresses are already reserved by some other device,
     70you will get into big trouble! DON'T USE THIS IF YOU ARE NOT VERY SURE
     71ABOUT WHAT YOU ARE DOING!
     72
     73The PIIX4E is just an new version of the PIIX4; it is supported as well.
     74The PIIX/PIIX3 does not implement an SMBus or I2C bus, so you can't use
     75this driver on those mainboards.
     76
     77The ServerWorks Southbridges, the Intel 440MX, and the Victory66 are
     78identical to the PIIX4 in I2C/SMBus support.
     79
     80The AMD SB700, SB800, SP5100 and Hudson-2 chipsets implement two
     81PIIX4-compatible SMBus controllers. If your BIOS initializes the
     82secondary controller, it will be detected by this driver as
     83an "Auxiliary SMBus Host Controller".
     84
     85If you own Force CPCI735 motherboard or other OSB4 based systems you may need
     86to change the SMBus Interrupt Select register so the SMBus controller uses
     87the SMI mode.
     88
     891) Use lspci command and locate the PCI device with the SMBus controller:
     90   00:0f.0 ISA bridge: ServerWorks OSB4 South Bridge (rev 4f)
     91   The line may vary for different chipsets. Please consult the driver source
     92   for all possible PCI ids (and lspci -n to match them). Lets assume the
     93   device is located at 00:0f.0.
     942) Now you just need to change the value in 0xD2 register. Get it first with
     95   command: lspci -xxx -s 00:0f.0
     96   If the value is 0x3 then you need to change it to 0x1:
     97   setpci  -s 00:0f.0 d2.b=1
     98
     99Please note that you don't need to do that in all cases, just when the SMBus is
    100not working properly.
    101
    102
    103Hardware-specific issues
    104------------------------
    105
    106This driver will refuse to load on IBM systems with an Intel PIIX4 SMBus.
    107Some of these machines have an RFID EEPROM (24RF08) connected to the SMBus,
    108which can easily get corrupted due to a state machine bug. These are mostly
    109Thinkpad laptops, but desktop systems may also be affected. We have no list
    110of all affected systems, so the only safe solution was to prevent access to
    111the SMBus on all IBM systems (detected using DMI data.)
    112
    113For additional information, read:
    114http://www.lm-sensors.org/browser/lm-sensors/trunk/README