cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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i2c-mux-gpio.rst (2904B)


      1==========================
      2Kernel driver i2c-mux-gpio
      3==========================
      4
      5Author: Peter Korsgaard <peter.korsgaard@barco.com>
      6
      7Description
      8-----------
      9
     10i2c-mux-gpio is an i2c mux driver providing access to I2C bus segments
     11from a master I2C bus and a hardware MUX controlled through GPIO pins.
     12
     13E.G.::
     14
     15  ----------              ----------  Bus segment 1   - - - - -
     16 |          | SCL/SDA    |          |-------------- |           |
     17 |          |------------|          |
     18 |          |            |          | Bus segment 2 |           |
     19 |  Linux   | GPIO 1..N  |   MUX    |---------------   Devices
     20 |          |------------|          |               |           |
     21 |          |            |          | Bus segment M
     22 |          |            |          |---------------|           |
     23  ----------              ----------                  - - - - -
     24
     25SCL/SDA of the master I2C bus is multiplexed to bus segment 1..M
     26according to the settings of the GPIO pins 1..N.
     27
     28Usage
     29-----
     30
     31i2c-mux-gpio uses the platform bus, so you need to provide a struct
     32platform_device with the platform_data pointing to a struct
     33i2c_mux_gpio_platform_data with the I2C adapter number of the master
     34bus, the number of bus segments to create and the GPIO pins used
     35to control it. See include/linux/platform_data/i2c-mux-gpio.h for details.
     36
     37E.G. something like this for a MUX providing 4 bus segments
     38controlled through 3 GPIO pins::
     39
     40  #include <linux/platform_data/i2c-mux-gpio.h>
     41  #include <linux/platform_device.h>
     42
     43  static const unsigned myboard_gpiomux_gpios[] = {
     44	AT91_PIN_PC26, AT91_PIN_PC25, AT91_PIN_PC24
     45  };
     46
     47  static const unsigned myboard_gpiomux_values[] = {
     48	0, 1, 2, 3
     49  };
     50
     51  static struct i2c_mux_gpio_platform_data myboard_i2cmux_data = {
     52	.parent		= 1,
     53	.base_nr	= 2, /* optional */
     54	.values		= myboard_gpiomux_values,
     55	.n_values	= ARRAY_SIZE(myboard_gpiomux_values),
     56	.gpios		= myboard_gpiomux_gpios,
     57	.n_gpios	= ARRAY_SIZE(myboard_gpiomux_gpios),
     58	.idle		= 4, /* optional */
     59  };
     60
     61  static struct platform_device myboard_i2cmux = {
     62	.name		= "i2c-mux-gpio",
     63	.id		= 0,
     64	.dev		= {
     65		.platform_data	= &myboard_i2cmux_data,
     66	},
     67  };
     68
     69If you don't know the absolute GPIO pin numbers at registration time,
     70you can instead provide a chip name (.chip_name) and relative GPIO pin
     71numbers, and the i2c-mux-gpio driver will do the work for you,
     72including deferred probing if the GPIO chip isn't immediately
     73available.
     74
     75Device Registration
     76-------------------
     77
     78When registering your i2c-mux-gpio device, you should pass the number
     79of any GPIO pin it uses as the device ID. This guarantees that every
     80instance has a different ID.
     81
     82Alternatively, if you don't need a stable device name, you can simply
     83pass PLATFORM_DEVID_AUTO as the device ID, and the platform core will
     84assign a dynamic ID to your device. If you do not know the absolute
     85GPIO pin numbers at registration time, this is even the only option.