53c700.rst (4703B)
1.. SPDX-License-Identifier: GPL-2.0 2 3======================= 4The 53c700 Driver Notes 5======================= 6 7General Description 8=================== 9 10This driver supports the 53c700 and 53c700-66 chips. It also supports 11the 53c710 but only in 53c700 emulation mode. It is full featured and 12does sync (-66 and 710 only), disconnects and tag command queueing. 13 14Since the 53c700 must be interfaced to a bus, you need to wrapper the 15card detector around this driver. For an example, see the 16NCR_D700.[ch] or lasi700.[ch] files. 17 18The comments in the 53c700.[ch] files tell you which parts you need to 19fill in to get the driver working. 20 21 22Compile Time Flags 23================== 24 25A compile time flag is:: 26 27 CONFIG_53C700_LE_ON_BE 28 29define if the chipset must be supported in little endian mode on a big 30endian architecture (used for the 700 on parisc). 31 32 33Using the Chip Core Driver 34========================== 35 36In order to plumb the 53c700 chip core driver into a working SCSI 37driver, you need to know three things about the way the chip is wired 38into your system (or expansion card). 39 401. The clock speed of the SCSI core 412. The interrupt line used 423. The memory (or io space) location of the 53c700 registers. 43 44Optionally, you may also need to know other things, like how to read 45the SCSI Id from the card bios or whether the chip is wired for 46differential operation. 47 48Usually you can find items 2. and 3. from general spec. documents or 49even by examining the configuration of a working driver under another 50operating system. 51 52The clock speed is usually buried deep in the technical literature. 53It is required because it is used to set up both the synchronous and 54asynchronous dividers for the chip. As a general rule of thumb, 55manufacturers set the clock speed at the lowest possible setting 56consistent with the best operation of the chip (although some choose 57to drive it off the CPU or bus clock rather than going to the expense 58of an extra clock chip). The best operation clock speeds are: 59 60========= ===== 6153c700 25MHz 6253c700-66 50MHz 6353c710 40Mhz 64========= ===== 65 66Writing Your Glue Driver 67======================== 68 69This will be a standard SCSI driver (I don't know of a good document 70describing this, just copy from some other driver) with at least a 71detect and release entry. 72 73In the detect routine, you need to allocate a struct 74NCR_700_Host_Parameters sized memory area and clear it (so that the 75default values for everything are 0). Then you must fill in the 76parameters that matter to you (see below), plumb the NCR_700_intr 77routine into the interrupt line and call NCR_700_detect with the host 78template and the new parameters as arguments. You should also call 79the relevant request_*_region function and place the register base 80address into the 'base' pointer of the host parameters. 81 82In the release routine, you must free the NCR_700_Host_Parameters that 83you allocated, call the corresponding release_*_region and free the 84interrupt. 85 86Handling Interrupts 87------------------- 88 89In general, you should just plumb the card's interrupt line in with 90 91request_irq(irq, NCR_700_intr, <irq flags>, <driver name>, host); 92 93where host is the return from the relevant NCR_700_detect() routine. 94 95You may also write your own interrupt handling routine which calls 96NCR_700_intr() directly. However, you should only really do this if 97you have a card with more than one chip on it and you can read a 98register to tell which set of chips wants the interrupt. 99 100Settable NCR_700_Host_Parameters 101-------------------------------- 102 103The following are a list of the user settable parameters: 104 105clock: (MANDATORY) 106 Set to the clock speed of the chip in MHz. 107 108base: (MANDATORY) 109 Set to the base of the io or mem region for the register set. On 64 110 bit architectures this is only 32 bits wide, so the registers must be 111 mapped into the low 32 bits of memory. 112 113pci_dev: (OPTIONAL) 114 Set to the PCI board device. Leave NULL for a non-pci board. This is 115 used for the pci_alloc_consistent() and pci_map_*() functions. 116 117dmode_extra: (OPTIONAL, 53c710 only) 118 Extra flags for the DMODE register. These are used to control bus 119 output pins on the 710. The settings should be a combination of 120 DMODE_FC1 and DMODE_FC2. What these pins actually do is entirely up 121 to the board designer. Usually it is safe to ignore this setting. 122 123differential: (OPTIONAL) 124 Set to 1 if the chip drives a differential bus. 125 126force_le_on_be: (OPTIONAL, only if CONFIG_53C700_LE_ON_BE is set) 127 Set to 1 if the chip is operating in little endian mode on a big 128 endian architecture. 129 130chip710: (OPTIONAL) 131 Set to 1 if the chip is a 53c710. 132 133burst_disable: (OPTIONAL, 53c710 only) 134 Disable 8 byte bursting for DMA transfers.