cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
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vmemmap_dedup.rst (11323B)


      1.. SPDX-License-Identifier: GPL-2.0
      2
      3=========================================
      4A vmemmap diet for HugeTLB and Device DAX
      5=========================================
      6
      7HugeTLB
      8=======
      9
     10The struct page structures (page structs) are used to describe a physical
     11page frame. By default, there is a one-to-one mapping from a page frame to
     12it's corresponding page struct.
     13
     14HugeTLB pages consist of multiple base page size pages and is supported by many
     15architectures. See Documentation/admin-guide/mm/hugetlbpage.rst for more
     16details. On the x86-64 architecture, HugeTLB pages of size 2MB and 1GB are
     17currently supported. Since the base page size on x86 is 4KB, a 2MB HugeTLB page
     18consists of 512 base pages and a 1GB HugeTLB page consists of 4096 base pages.
     19For each base page, there is a corresponding page struct.
     20
     21Within the HugeTLB subsystem, only the first 4 page structs are used to
     22contain unique information about a HugeTLB page. __NR_USED_SUBPAGE provides
     23this upper limit. The only 'useful' information in the remaining page structs
     24is the compound_head field, and this field is the same for all tail pages.
     25
     26By removing redundant page structs for HugeTLB pages, memory can be returned
     27to the buddy allocator for other uses.
     28
     29Different architectures support different HugeTLB pages. For example, the
     30following table is the HugeTLB page size supported by x86 and arm64
     31architectures. Because arm64 supports 4k, 16k, and 64k base pages and
     32supports contiguous entries, so it supports many kinds of sizes of HugeTLB
     33page.
     34
     35+--------------+-----------+-----------------------------------------------+
     36| Architecture | Page Size |                HugeTLB Page Size              |
     37+--------------+-----------+-----------+-----------+-----------+-----------+
     38|    x86-64    |    4KB    |    2MB    |    1GB    |           |           |
     39+--------------+-----------+-----------+-----------+-----------+-----------+
     40|              |    4KB    |   64KB    |    2MB    |    32MB   |    1GB    |
     41|              +-----------+-----------+-----------+-----------+-----------+
     42|    arm64     |   16KB    |    2MB    |   32MB    |     1GB   |           |
     43|              +-----------+-----------+-----------+-----------+-----------+
     44|              |   64KB    |    2MB    |  512MB    |    16GB   |           |
     45+--------------+-----------+-----------+-----------+-----------+-----------+
     46
     47When the system boot up, every HugeTLB page has more than one struct page
     48structs which size is (unit: pages)::
     49
     50   struct_size = HugeTLB_Size / PAGE_SIZE * sizeof(struct page) / PAGE_SIZE
     51
     52Where HugeTLB_Size is the size of the HugeTLB page. We know that the size
     53of the HugeTLB page is always n times PAGE_SIZE. So we can get the following
     54relationship::
     55
     56   HugeTLB_Size = n * PAGE_SIZE
     57
     58Then::
     59
     60   struct_size = n * PAGE_SIZE / PAGE_SIZE * sizeof(struct page) / PAGE_SIZE
     61               = n * sizeof(struct page) / PAGE_SIZE
     62
     63We can use huge mapping at the pud/pmd level for the HugeTLB page.
     64
     65For the HugeTLB page of the pmd level mapping, then::
     66
     67   struct_size = n * sizeof(struct page) / PAGE_SIZE
     68               = PAGE_SIZE / sizeof(pte_t) * sizeof(struct page) / PAGE_SIZE
     69               = sizeof(struct page) / sizeof(pte_t)
     70               = 64 / 8
     71               = 8 (pages)
     72
     73Where n is how many pte entries which one page can contains. So the value of
     74n is (PAGE_SIZE / sizeof(pte_t)).
     75
     76This optimization only supports 64-bit system, so the value of sizeof(pte_t)
     77is 8. And this optimization also applicable only when the size of struct page
     78is a power of two. In most cases, the size of struct page is 64 bytes (e.g.
     79x86-64 and arm64). So if we use pmd level mapping for a HugeTLB page, the
     80size of struct page structs of it is 8 page frames which size depends on the
     81size of the base page.
     82
     83For the HugeTLB page of the pud level mapping, then::
     84
     85   struct_size = PAGE_SIZE / sizeof(pmd_t) * struct_size(pmd)
     86               = PAGE_SIZE / 8 * 8 (pages)
     87               = PAGE_SIZE (pages)
     88
     89Where the struct_size(pmd) is the size of the struct page structs of a
     90HugeTLB page of the pmd level mapping.
     91
     92E.g.: A 2MB HugeTLB page on x86_64 consists in 8 page frames while 1GB
     93HugeTLB page consists in 4096.
     94
     95Next, we take the pmd level mapping of the HugeTLB page as an example to
     96show the internal implementation of this optimization. There are 8 pages
     97struct page structs associated with a HugeTLB page which is pmd mapped.
     98
     99Here is how things look before optimization::
    100
    101    HugeTLB                  struct pages(8 pages)         page frame(8 pages)
    102 +-----------+ ---virt_to_page---> +-----------+   mapping to   +-----------+
    103 |           |                     |     0     | -------------> |     0     |
    104 |           |                     +-----------+                +-----------+
    105 |           |                     |     1     | -------------> |     1     |
    106 |           |                     +-----------+                +-----------+
    107 |           |                     |     2     | -------------> |     2     |
    108 |           |                     +-----------+                +-----------+
    109 |           |                     |     3     | -------------> |     3     |
    110 |           |                     +-----------+                +-----------+
    111 |           |                     |     4     | -------------> |     4     |
    112 |    PMD    |                     +-----------+                +-----------+
    113 |   level   |                     |     5     | -------------> |     5     |
    114 |  mapping  |                     +-----------+                +-----------+
    115 |           |                     |     6     | -------------> |     6     |
    116 |           |                     +-----------+                +-----------+
    117 |           |                     |     7     | -------------> |     7     |
    118 |           |                     +-----------+                +-----------+
    119 |           |
    120 |           |
    121 |           |
    122 +-----------+
    123
    124The value of page->compound_head is the same for all tail pages. The first
    125page of page structs (page 0) associated with the HugeTLB page contains the 4
    126page structs necessary to describe the HugeTLB. The only use of the remaining
    127pages of page structs (page 1 to page 7) is to point to page->compound_head.
    128Therefore, we can remap pages 1 to 7 to page 0. Only 1 page of page structs
    129will be used for each HugeTLB page. This will allow us to free the remaining
    1307 pages to the buddy allocator.
    131
    132Here is how things look after remapping::
    133
    134    HugeTLB                  struct pages(8 pages)         page frame(8 pages)
    135 +-----------+ ---virt_to_page---> +-----------+   mapping to   +-----------+
    136 |           |                     |     0     | -------------> |     0     |
    137 |           |                     +-----------+                +-----------+
    138 |           |                     |     1     | ---------------^ ^ ^ ^ ^ ^ ^
    139 |           |                     +-----------+                  | | | | | |
    140 |           |                     |     2     | -----------------+ | | | | |
    141 |           |                     +-----------+                    | | | | |
    142 |           |                     |     3     | -------------------+ | | | |
    143 |           |                     +-----------+                      | | | |
    144 |           |                     |     4     | ---------------------+ | | |
    145 |    PMD    |                     +-----------+                        | | |
    146 |   level   |                     |     5     | -----------------------+ | |
    147 |  mapping  |                     +-----------+                          | |
    148 |           |                     |     6     | -------------------------+ |
    149 |           |                     +-----------+                            |
    150 |           |                     |     7     | ---------------------------+
    151 |           |                     +-----------+
    152 |           |
    153 |           |
    154 |           |
    155 +-----------+
    156
    157When a HugeTLB is freed to the buddy system, we should allocate 7 pages for
    158vmemmap pages and restore the previous mapping relationship.
    159
    160For the HugeTLB page of the pud level mapping. It is similar to the former.
    161We also can use this approach to free (PAGE_SIZE - 1) vmemmap pages.
    162
    163Apart from the HugeTLB page of the pmd/pud level mapping, some architectures
    164(e.g. aarch64) provides a contiguous bit in the translation table entries
    165that hints to the MMU to indicate that it is one of a contiguous set of
    166entries that can be cached in a single TLB entry.
    167
    168The contiguous bit is used to increase the mapping size at the pmd and pte
    169(last) level. So this type of HugeTLB page can be optimized only when its
    170size of the struct page structs is greater than 1 page.
    171
    172Notice: The head vmemmap page is not freed to the buddy allocator and all
    173tail vmemmap pages are mapped to the head vmemmap page frame. So we can see
    174more than one struct page struct with PG_head (e.g. 8 per 2 MB HugeTLB page)
    175associated with each HugeTLB page. The compound_head() can handle this
    176correctly (more details refer to the comment above compound_head()).
    177
    178Device DAX
    179==========
    180
    181The device-dax interface uses the same tail deduplication technique explained
    182in the previous chapter, except when used with the vmemmap in
    183the device (altmap).
    184
    185The following page sizes are supported in DAX: PAGE_SIZE (4K on x86_64),
    186PMD_SIZE (2M on x86_64) and PUD_SIZE (1G on x86_64).
    187
    188The differences with HugeTLB are relatively minor.
    189
    190It only use 3 page structs for storing all information as opposed
    191to 4 on HugeTLB pages.
    192
    193There's no remapping of vmemmap given that device-dax memory is not part of
    194System RAM ranges initialized at boot. Thus the tail page deduplication
    195happens at a later stage when we populate the sections. HugeTLB reuses the
    196the head vmemmap page representing, whereas device-dax reuses the tail
    197vmemmap page. This results in only half of the savings compared to HugeTLB.
    198
    199Deduplicated tail pages are not mapped read-only.
    200
    201Here's how things look like on device-dax after the sections are populated::
    202
    203 +-----------+ ---virt_to_page---> +-----------+   mapping to   +-----------+
    204 |           |                     |     0     | -------------> |     0     |
    205 |           |                     +-----------+                +-----------+
    206 |           |                     |     1     | -------------> |     1     |
    207 |           |                     +-----------+                +-----------+
    208 |           |                     |     2     | ----------------^ ^ ^ ^ ^ ^
    209 |           |                     +-----------+                   | | | | |
    210 |           |                     |     3     | ------------------+ | | | |
    211 |           |                     +-----------+                     | | | |
    212 |           |                     |     4     | --------------------+ | | |
    213 |    PMD    |                     +-----------+                       | | |
    214 |   level   |                     |     5     | ----------------------+ | |
    215 |  mapping  |                     +-----------+                         | |
    216 |           |                     |     6     | ------------------------+ |
    217 |           |                     +-----------+                           |
    218 |           |                     |     7     | --------------------------+
    219 |           |                     +-----------+
    220 |           |
    221 |           |
    222 |           |
    223 +-----------+