cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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boot-options.rst (9703B)


      1.. SPDX-License-Identifier: GPL-2.0
      2
      3===========================
      4AMD64 Specific Boot Options
      5===========================
      6
      7There are many others (usually documented in driver documentation), but
      8only the AMD64 specific ones are listed here.
      9
     10Machine check
     11=============
     12Please see Documentation/x86/x86_64/machinecheck.rst for sysfs runtime tunables.
     13
     14   mce=off
     15		Disable machine check
     16   mce=no_cmci
     17		Disable CMCI(Corrected Machine Check Interrupt) that
     18		Intel processor supports.  Usually this disablement is
     19		not recommended, but it might be handy if your hardware
     20		is misbehaving.
     21		Note that you'll get more problems without CMCI than with
     22		due to the shared banks, i.e. you might get duplicated
     23		error logs.
     24   mce=dont_log_ce
     25		Don't make logs for corrected errors.  All events reported
     26		as corrected are silently cleared by OS.
     27		This option will be useful if you have no interest in any
     28		of corrected errors.
     29   mce=ignore_ce
     30		Disable features for corrected errors, e.g. polling timer
     31		and CMCI.  All events reported as corrected are not cleared
     32		by OS and remained in its error banks.
     33		Usually this disablement is not recommended, however if
     34		there is an agent checking/clearing corrected errors
     35		(e.g. BIOS or hardware monitoring applications), conflicting
     36		with OS's error handling, and you cannot deactivate the agent,
     37		then this option will be a help.
     38   mce=no_lmce
     39		Do not opt-in to Local MCE delivery. Use legacy method
     40		to broadcast MCEs.
     41   mce=bootlog
     42		Enable logging of machine checks left over from booting.
     43		Disabled by default on AMD Fam10h and older because some BIOS
     44		leave bogus ones.
     45		If your BIOS doesn't do that it's a good idea to enable though
     46		to make sure you log even machine check events that result
     47		in a reboot. On Intel systems it is enabled by default.
     48   mce=nobootlog
     49		Disable boot machine check logging.
     50   mce=monarchtimeout (number)
     51		monarchtimeout:
     52		Sets the time in us to wait for other CPUs on machine checks. 0
     53		to disable.
     54   mce=bios_cmci_threshold
     55		Don't overwrite the bios-set CMCI threshold. This boot option
     56		prevents Linux from overwriting the CMCI threshold set by the
     57		bios. Without this option, Linux always sets the CMCI
     58		threshold to 1. Enabling this may make memory predictive failure
     59		analysis less effective if the bios sets thresholds for memory
     60		errors since we will not see details for all errors.
     61   mce=recovery
     62		Force-enable recoverable machine check code paths
     63
     64   nomce (for compatibility with i386)
     65		same as mce=off
     66
     67   Everything else is in sysfs now.
     68
     69APICs
     70=====
     71
     72   apic
     73	Use IO-APIC. Default
     74
     75   noapic
     76	Don't use the IO-APIC.
     77
     78   disableapic
     79	Don't use the local APIC
     80
     81   nolapic
     82     Don't use the local APIC (alias for i386 compatibility)
     83
     84   pirq=...
     85	See Documentation/x86/i386/IO-APIC.rst
     86
     87   noapictimer
     88	Don't set up the APIC timer
     89
     90   no_timer_check
     91	Don't check the IO-APIC timer. This can work around
     92	problems with incorrect timer initialization on some boards.
     93
     94   apicpmtimer
     95	Do APIC timer calibration using the pmtimer. Implies
     96	apicmaintimer. Useful when your PIT timer is totally broken.
     97
     98Timing
     99======
    100
    101  notsc
    102    Deprecated, use tsc=unstable instead.
    103
    104  nohpet
    105    Don't use the HPET timer.
    106
    107Idle loop
    108=========
    109
    110  idle=poll
    111    Don't do power saving in the idle loop using HLT, but poll for rescheduling
    112    event. This will make the CPUs eat a lot more power, but may be useful
    113    to get slightly better performance in multiprocessor benchmarks. It also
    114    makes some profiling using performance counters more accurate.
    115    Please note that on systems with MONITOR/MWAIT support (like Intel EM64T
    116    CPUs) this option has no performance advantage over the normal idle loop.
    117    It may also interact badly with hyperthreading.
    118
    119Rebooting
    120=========
    121
    122   reboot=b[ios] | t[riple] | k[bd] | a[cpi] | e[fi] | p[ci] [, [w]arm | [c]old]
    123      bios
    124        Use the CPU reboot vector for warm reset
    125      warm
    126        Don't set the cold reboot flag
    127      cold
    128        Set the cold reboot flag
    129      triple
    130        Force a triple fault (init)
    131      kbd
    132        Use the keyboard controller. cold reset (default)
    133      acpi
    134        Use the ACPI RESET_REG in the FADT. If ACPI is not configured or
    135        the ACPI reset does not work, the reboot path attempts the reset
    136        using the keyboard controller.
    137      efi
    138        Use efi reset_system runtime service. If EFI is not configured or
    139        the EFI reset does not work, the reboot path attempts the reset using
    140        the keyboard controller.
    141      pci
    142        Use a write to the PCI config space register 0xcf9 to trigger reboot.
    143
    144   Using warm reset will be much faster especially on big memory
    145   systems because the BIOS will not go through the memory check.
    146   Disadvantage is that not all hardware will be completely reinitialized
    147   on reboot so there may be boot problems on some systems.
    148
    149   reboot=force
    150     Don't stop other CPUs on reboot. This can make reboot more reliable
    151     in some cases.
    152
    153   reboot=default
    154     There are some built-in platform specific "quirks" - you may see:
    155     "reboot: <name> series board detected. Selecting <type> for reboots."
    156     In the case where you think the quirk is in error (e.g. you have
    157     newer BIOS, or newer board) using this option will ignore the built-in
    158     quirk table, and use the generic default reboot actions.
    159
    160NUMA
    161====
    162
    163  numa=off
    164    Only set up a single NUMA node spanning all memory.
    165
    166  numa=noacpi
    167    Don't parse the SRAT table for NUMA setup
    168
    169  numa=nohmat
    170    Don't parse the HMAT table for NUMA setup, or soft-reserved memory
    171    partitioning.
    172
    173  numa=fake=<size>[MG]
    174    If given as a memory unit, fills all system RAM with nodes of
    175    size interleaved over physical nodes.
    176
    177  numa=fake=<N>
    178    If given as an integer, fills all system RAM with N fake nodes
    179    interleaved over physical nodes.
    180
    181  numa=fake=<N>U
    182    If given as an integer followed by 'U', it will divide each
    183    physical node into N emulated nodes.
    184
    185ACPI
    186====
    187
    188  acpi=off
    189    Don't enable ACPI
    190  acpi=ht
    191    Use ACPI boot table parsing, but don't enable ACPI interpreter
    192  acpi=force
    193    Force ACPI on (currently not needed)
    194  acpi=strict
    195    Disable out of spec ACPI workarounds.
    196  acpi_sci={edge,level,high,low}
    197    Set up ACPI SCI interrupt.
    198  acpi=noirq
    199    Don't route interrupts
    200  acpi=nocmcff
    201    Disable firmware first mode for corrected errors. This
    202    disables parsing the HEST CMC error source to check if
    203    firmware has set the FF flag. This may result in
    204    duplicate corrected error reports.
    205
    206PCI
    207===
    208
    209  pci=off
    210    Don't use PCI
    211  pci=conf1
    212    Use conf1 access.
    213  pci=conf2
    214    Use conf2 access.
    215  pci=rom
    216    Assign ROMs.
    217  pci=assign-busses
    218    Assign busses
    219  pci=irqmask=MASK
    220    Set PCI interrupt mask to MASK
    221  pci=lastbus=NUMBER
    222    Scan up to NUMBER busses, no matter what the mptable says.
    223  pci=noacpi
    224    Don't use ACPI to set up PCI interrupt routing.
    225
    226IOMMU (input/output memory management unit)
    227===========================================
    228Multiple x86-64 PCI-DMA mapping implementations exist, for example:
    229
    230   1. <kernel/dma/direct.c>: use no hardware/software IOMMU at all
    231      (e.g. because you have < 3 GB memory).
    232      Kernel boot message: "PCI-DMA: Disabling IOMMU"
    233
    234   2. <arch/x86/kernel/amd_gart_64.c>: AMD GART based hardware IOMMU.
    235      Kernel boot message: "PCI-DMA: using GART IOMMU"
    236
    237   3. <arch/x86_64/kernel/pci-swiotlb.c> : Software IOMMU implementation. Used
    238      e.g. if there is no hardware IOMMU in the system and it is need because
    239      you have >3GB memory or told the kernel to us it (iommu=soft))
    240      Kernel boot message: "PCI-DMA: Using software bounce buffering
    241      for IO (SWIOTLB)"
    242
    243::
    244
    245  iommu=[<size>][,noagp][,off][,force][,noforce]
    246  [,memaper[=<order>]][,merge][,fullflush][,nomerge]
    247  [,noaperture]
    248
    249General iommu options:
    250
    251    off
    252      Don't initialize and use any kind of IOMMU.
    253    noforce
    254      Don't force hardware IOMMU usage when it is not needed. (default).
    255    force
    256      Force the use of the hardware IOMMU even when it is
    257      not actually needed (e.g. because < 3 GB memory).
    258    soft
    259      Use software bounce buffering (SWIOTLB) (default for
    260      Intel machines). This can be used to prevent the usage
    261      of an available hardware IOMMU.
    262
    263iommu options only relevant to the AMD GART hardware IOMMU:
    264
    265    <size>
    266      Set the size of the remapping area in bytes.
    267    allowed
    268      Overwrite iommu off workarounds for specific chipsets.
    269    fullflush
    270      Flush IOMMU on each allocation (default).
    271    nofullflush
    272      Don't use IOMMU fullflush.
    273    memaper[=<order>]
    274      Allocate an own aperture over RAM with size 32MB<<order.
    275      (default: order=1, i.e. 64MB)
    276    merge
    277      Do scatter-gather (SG) merging. Implies "force" (experimental).
    278    nomerge
    279      Don't do scatter-gather (SG) merging.
    280    noaperture
    281      Ask the IOMMU not to touch the aperture for AGP.
    282    noagp
    283      Don't initialize the AGP driver and use full aperture.
    284    panic
    285      Always panic when IOMMU overflows.
    286
    287iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU
    288implementation:
    289
    290    swiotlb=<pages>[,force]
    291      <pages>
    292        Prereserve that many 128K pages for the software IO bounce buffering.
    293      force
    294        Force all IO through the software TLB.
    295
    296
    297Miscellaneous
    298=============
    299
    300  nogbpages
    301    Do not use GB pages for kernel direct mappings.
    302  gbpages
    303    Use GB pages for kernel direct mappings.
    304
    305
    306AMD SEV (Secure Encrypted Virtualization)
    307=========================================
    308Options relating to AMD SEV, specified via the following format:
    309
    310::
    311
    312   sev=option1[,option2]
    313
    314The available options are:
    315
    316   debug
    317     Enable debug messages.