cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pci.h (2733B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef __ALPHA_PCI_H
      3#define __ALPHA_PCI_H
      4
      5#ifdef __KERNEL__
      6
      7#include <linux/spinlock.h>
      8#include <linux/dma-mapping.h>
      9#include <linux/scatterlist.h>
     10#include <asm/machvec.h>
     11
     12/*
     13 * The following structure is used to manage multiple PCI busses.
     14 */
     15
     16struct pci_iommu_arena;
     17struct page;
     18
     19/* A controller.  Used to manage multiple PCI busses.  */
     20
     21struct pci_controller {
     22	struct pci_controller *next;
     23        struct pci_bus *bus;
     24	struct resource *io_space;
     25	struct resource *mem_space;
     26
     27	/* The following are for reporting to userland.  The invariant is
     28	   that if we report a BWX-capable dense memory, we do not report
     29	   a sparse memory at all, even if it exists.  */
     30	unsigned long sparse_mem_base;
     31	unsigned long dense_mem_base;
     32	unsigned long sparse_io_base;
     33	unsigned long dense_io_base;
     34
     35	/* This one's for the kernel only.  It's in KSEG somewhere.  */
     36	unsigned long config_space_base;
     37
     38	unsigned int index;
     39	/* For compatibility with current (as of July 2003) pciutils
     40	   and XFree86. Eventually will be removed. */
     41	unsigned int need_domain_info;
     42
     43	struct pci_iommu_arena *sg_pci;
     44	struct pci_iommu_arena *sg_isa;
     45
     46	void *sysdata;
     47};
     48
     49/* Override the logic in pci_scan_bus for skipping already-configured
     50   bus numbers.  */
     51
     52#define pcibios_assign_all_busses()	1
     53
     54#define PCIBIOS_MIN_IO		alpha_mv.min_io_address
     55#define PCIBIOS_MIN_MEM		alpha_mv.min_mem_address
     56
     57/* IOMMU controls.  */
     58
     59/* TODO: integrate with include/asm-generic/pci.h ? */
     60static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
     61{
     62	return channel ? 15 : 14;
     63}
     64
     65#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
     66
     67static inline int pci_proc_domain(struct pci_bus *bus)
     68{
     69	struct pci_controller *hose = bus->sysdata;
     70	return hose->need_domain_info;
     71}
     72
     73#endif /* __KERNEL__ */
     74
     75/* Values for the `which' argument to sys_pciconfig_iobase.  */
     76#define IOBASE_HOSE		0
     77#define IOBASE_SPARSE_MEM	1
     78#define IOBASE_DENSE_MEM	2
     79#define IOBASE_SPARSE_IO	3
     80#define IOBASE_DENSE_IO		4
     81#define IOBASE_ROOT_BUS		5
     82#define IOBASE_FROM_HOSE	0x10000
     83
     84extern struct pci_dev *isa_bridge;
     85
     86extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
     87			   size_t count);
     88extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
     89			    size_t count);
     90extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
     91				      struct vm_area_struct *vma,
     92				      enum pci_mmap_state mmap_state);
     93extern void pci_adjust_legacy_attr(struct pci_bus *bus,
     94				   enum pci_mmap_state mmap_type);
     95#define HAVE_PCI_LEGACY	1
     96
     97extern int pci_create_resource_files(struct pci_dev *dev);
     98extern void pci_remove_resource_files(struct pci_dev *dev);
     99
    100#endif /* __ALPHA_PCI_H */