cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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perf_event.h (2050B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Linux performance counter support for ARC
      4 *
      5 * Copyright (C) 2014-2015 Synopsys, Inc. (www.synopsys.com)
      6 * Copyright (C) 2011-2013 Synopsys, Inc. (www.synopsys.com)
      7 */
      8
      9#ifndef __ASM_PERF_EVENT_H
     10#define __ASM_PERF_EVENT_H
     11
     12/* Max number of counters that PCT block may ever have */
     13#define ARC_PERF_MAX_COUNTERS	32
     14
     15#define ARC_REG_CC_BUILD	0xF6
     16#define ARC_REG_CC_INDEX	0x240
     17#define ARC_REG_CC_NAME0	0x241
     18#define ARC_REG_CC_NAME1	0x242
     19
     20#define ARC_REG_PCT_BUILD	0xF5
     21#define ARC_REG_PCT_COUNTL	0x250
     22#define ARC_REG_PCT_COUNTH	0x251
     23#define ARC_REG_PCT_SNAPL	0x252
     24#define ARC_REG_PCT_SNAPH	0x253
     25#define ARC_REG_PCT_CONFIG	0x254
     26#define ARC_REG_PCT_CONTROL	0x255
     27#define ARC_REG_PCT_INDEX	0x256
     28#define ARC_REG_PCT_INT_CNTL	0x25C
     29#define ARC_REG_PCT_INT_CNTH	0x25D
     30#define ARC_REG_PCT_INT_CTRL	0x25E
     31#define ARC_REG_PCT_INT_ACT	0x25F
     32
     33#define ARC_REG_PCT_CONFIG_USER	(1 << 18)	/* count in user mode */
     34#define ARC_REG_PCT_CONFIG_KERN	(1 << 19)	/* count in kernel mode */
     35
     36#define ARC_REG_PCT_CONTROL_CC	(1 << 16)	/* clear counts */
     37#define ARC_REG_PCT_CONTROL_SN	(1 << 17)	/* snapshot */
     38
     39struct arc_reg_pct_build {
     40#ifdef CONFIG_CPU_BIG_ENDIAN
     41	unsigned int m:8, c:8, r:5, i:1, s:2, v:8;
     42#else
     43	unsigned int v:8, s:2, i:1, r:5, c:8, m:8;
     44#endif
     45};
     46
     47struct arc_reg_cc_build {
     48#ifdef CONFIG_CPU_BIG_ENDIAN
     49	unsigned int c:16, r:8, v:8;
     50#else
     51	unsigned int v:8, r:8, c:16;
     52#endif
     53};
     54
     55#define PERF_COUNT_ARC_DCLM	(PERF_COUNT_HW_MAX + 0)
     56#define PERF_COUNT_ARC_DCSM	(PERF_COUNT_HW_MAX + 1)
     57#define PERF_COUNT_ARC_ICM	(PERF_COUNT_HW_MAX + 2)
     58#define PERF_COUNT_ARC_BPOK	(PERF_COUNT_HW_MAX + 3)
     59#define PERF_COUNT_ARC_EDTLB	(PERF_COUNT_HW_MAX + 4)
     60#define PERF_COUNT_ARC_EITLB	(PERF_COUNT_HW_MAX + 5)
     61#define PERF_COUNT_ARC_LDC	(PERF_COUNT_HW_MAX + 6)
     62#define PERF_COUNT_ARC_STC	(PERF_COUNT_HW_MAX + 7)
     63
     64#define PERF_COUNT_ARC_HW_MAX	(PERF_COUNT_HW_MAX + 8)
     65
     66#ifdef CONFIG_PERF_EVENTS
     67#define perf_arch_bpf_user_pt_regs(regs) (struct user_regs_struct *)regs
     68#endif
     69
     70#endif /* __ASM_PERF_EVENT_H */