cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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head-sharpsl.S (3603B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * linux/arch/arm/boot/compressed/head-sharpsl.S
      4 *
      5 * Copyright (C) 2004-2005 Richard Purdie <rpurdie@rpsys.net>
      6 *
      7 * Sharp's bootloader doesn't pass any kind of machine ID
      8 * so we have to figure out the machine for ourselves...
      9 *
     10 * Support for Poodle, Corgi (SL-C700), Shepherd (SL-C750)
     11 * Husky (SL-C760), Tosa (SL-C6000), Spitz (SL-C3000),
     12 * Akita (SL-C1000) and Borzoi (SL-C3100).
     13 *
     14 */
     15
     16#include <linux/linkage.h>
     17#include <asm/mach-types.h>
     18
     19#ifndef CONFIG_PXA_SHARPSL
     20#error What am I doing here...
     21#endif
     22
     23		.section        ".start", "ax"
     24
     25__SharpSL_start:
     26
     27/* Check for TC6393 - if found we have a Tosa */
     28	ldr	r7, .TOSAID
     29	mov	r1, #0x10000000		@ Base address of TC6393 chip
     30	mov 	r6, #0x03
     31	ldrh	r3, [r1, #8]		@ Load TC6393XB Revison: This is 0x0003
     32	cmp	r6, r3
     33	beq	.SHARPEND		@ Success -> tosa
     34
     35/* Check for pxa270 - if found, branch */
     36	mrc p15, 0, r4, c0, c0		@ Get Processor ID
     37	and	r4, r4, #0xffffff00
     38	ldr	r3, .PXA270ID
     39	cmp	r4, r3
     40	beq	.PXA270
     41
     42/* Check for w100 - if not found we have a Poodle */
     43	ldr	r1, .W100ADDR		@ Base address of w100 chip + regs offset
     44
     45	mov r6, #0x31			@ Load Magic Init value
     46	str	r6, [r1, #0x280]	@ to SCRATCH_UMSK
     47	mov r5, #0x3000
     48.W100LOOP:
     49	subs r5, r5, #1
     50	bne .W100LOOP
     51	mov r6, #0x30			@ Load 2nd Magic Init value
     52	str	r6, [r1, #0x280]	@ to SCRATCH_UMSK
     53
     54	ldr	r6, [r1, #0]		@ Load Chip ID
     55	ldr	r3, .W100ID
     56	ldr	r7, .POODLEID
     57	cmp	r6, r3
     58	bne	.SHARPEND			@ We have no w100 - Poodle
     59
     60/* Check for pxa250 - if found we have a Corgi */
     61	ldr	r7, .CORGIID
     62	ldr	r3, .PXA255ID
     63	cmp	r4, r3
     64	blo	.SHARPEND			@ We have a PXA250 - Corgi
     65
     66/* Check for 64MiB flash - if found we have a Shepherd */
     67	bl	get_flash_ids
     68	ldr	r7, .SHEPHERDID
     69	cmp	r3, #0x76			@ 64MiB flash
     70	beq	.SHARPEND			@ We have Shepherd
     71
     72/* Must be a Husky */
     73	ldr	r7, .HUSKYID		@ Must be Husky
     74	b .SHARPEND
     75
     76.PXA270:
     77/* Check for 16MiB flash - if found we have Spitz */
     78	bl	get_flash_ids
     79	ldr	r7, .SPITZID
     80	cmp	r3, #0x73			@ 16MiB flash
     81	beq	.SHARPEND			@ We have Spitz
     82
     83/* Check for a second SCOOP chip - if found we have Borzoi */
     84	ldr	r1, .SCOOP2ADDR
     85	ldr	r7, .BORZOIID
     86	mov 	r6, #0x0140
     87	strh	r6, [r1]
     88	ldrh	r6, [r1]
     89	cmp	r6, #0x0140
     90	beq	.SHARPEND			@ We have Borzoi
     91
     92/* Must be Akita */
     93	ldr	r7, .AKITAID
     94	b	.SHARPEND			@ We have Borzoi
     95
     96.PXA255ID:
     97	.word	0x69052d00		@ PXA255 Processor ID
     98.PXA270ID:
     99	.word	0x69054100		@ PXA270 Processor ID
    100.W100ID:
    101	.word	0x57411002		@ w100 Chip ID
    102.W100ADDR:
    103	.word 	0x08010000		@ w100 Chip ID Reg Address
    104.SCOOP2ADDR:
    105	.word	0x08800040
    106.POODLEID:
    107	.word	MACH_TYPE_POODLE
    108.CORGIID:
    109	.word	MACH_TYPE_CORGI
    110.SHEPHERDID:
    111	.word	MACH_TYPE_SHEPHERD
    112.HUSKYID:
    113	.word	MACH_TYPE_HUSKY
    114.TOSAID:
    115	.word	MACH_TYPE_TOSA
    116.SPITZID:
    117	.word	MACH_TYPE_SPITZ
    118.AKITAID:
    119	.word	MACH_TYPE_AKITA
    120.BORZOIID:
    121	.word	MACH_TYPE_BORZOI
    122
    123/*
    124 * Return: r2 - NAND Manufacturer ID
    125 *         r3 - NAND Chip ID
    126 * Corrupts: r1
    127 */
    128get_flash_ids:
    129	mov	r1, #0x0c000000		@ Base address of NAND chip
    130	ldrb	r3, [r1, #24]		@ Load FLASHCTL
    131	bic	r3, r3, #0x11		@ SET NCE
    132	orr	r3, r3, #0x0a		@ SET CLR + FLWP
    133	strb	r3, [r1, #24]		@ Save to FLASHCTL
    134	mov 	r2, #0x90		@ Command "readid"
    135	strb	r2, [r1, #20]		@ Save to FLASHIO
    136	bic	r3, r3, #2		@ CLR CLE
    137	orr	r3, r3, #4		@ SET ALE
    138	strb	r3, [r1, #24]		@ Save to FLASHCTL
    139	mov	r2, #0			@ Address 0x00
    140	strb	r2, [r1, #20]		@ Save to FLASHIO
    141	bic	r3, r3, #4		@ CLR ALE
    142	strb	r3, [r1, #24]		@ Save to FLASHCTL
    143.fids1:
    144	ldrb	r3, [r1, #24]		@ Load FLASHCTL
    145	tst	r3, #32			@ Is chip ready?
    146	beq	.fids1
    147	ldrb	r2, [r1, #20]		@ NAND Manufacturer ID
    148	ldrb	r3, [r1, #20]		@ NAND Chip ID
    149	mov	pc, lr
    150
    151.SHARPEND: