cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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misc-ep93xx.h (2331B)


      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
      4 */
      5
      6#include <asm/mach-types.h>
      7
      8static inline unsigned int __raw_readl(unsigned int ptr)
      9{
     10	return *((volatile unsigned int *)ptr);
     11}
     12
     13static inline void __raw_writeb(unsigned char value, unsigned int ptr)
     14{
     15	*((volatile unsigned char *)ptr) = value;
     16}
     17
     18static inline void __raw_writel(unsigned int value, unsigned int ptr)
     19{
     20	*((volatile unsigned int *)ptr) = value;
     21}
     22
     23/*
     24 * Some bootloaders don't turn off DMA from the ethernet MAC before
     25 * jumping to linux, which means that we might end up with bits of RX
     26 * status and packet data scribbled over the uncompressed kernel image.
     27 * Work around this by resetting the ethernet MAC before we uncompress.
     28 */
     29#define PHYS_ETH_SELF_CTL		0x80010020
     30#define ETH_SELF_CTL_RESET		0x00000001
     31
     32static inline void ep93xx_ethernet_reset(void)
     33{
     34	unsigned int v;
     35
     36	/* Reset the ethernet MAC.  */
     37	v = __raw_readl(PHYS_ETH_SELF_CTL);
     38	__raw_writel(v | ETH_SELF_CTL_RESET, PHYS_ETH_SELF_CTL);
     39
     40	/* Wait for reset to finish.  */
     41	while (__raw_readl(PHYS_ETH_SELF_CTL) & ETH_SELF_CTL_RESET)
     42		;
     43}
     44
     45#define TS72XX_WDT_CONTROL_PHYS_BASE	0x23800000
     46#define TS72XX_WDT_FEED_PHYS_BASE	0x23c00000
     47#define TS72XX_WDT_FEED_VAL		0x05
     48
     49static inline void __maybe_unused ts72xx_watchdog_disable(void)
     50{
     51	__raw_writeb(TS72XX_WDT_FEED_VAL, TS72XX_WDT_FEED_PHYS_BASE);
     52	__raw_writeb(0, TS72XX_WDT_CONTROL_PHYS_BASE);
     53}
     54
     55static inline void ep93xx_decomp_setup(void)
     56{
     57	if (machine_is_ts72xx())
     58		ts72xx_watchdog_disable();
     59
     60	if (machine_is_adssphere() ||
     61	    machine_is_edb9301() ||
     62	    machine_is_edb9302() ||
     63	    machine_is_edb9302a() ||
     64	    machine_is_edb9302a() ||
     65	    machine_is_edb9307() ||
     66	    machine_is_edb9307a() ||
     67	    machine_is_edb9307a() ||
     68	    machine_is_edb9312() ||
     69	    machine_is_edb9315() ||
     70	    machine_is_edb9315a() ||
     71	    machine_is_edb9315a() ||
     72	    machine_is_gesbc9312() ||
     73	    machine_is_micro9() ||
     74	    machine_is_micro9l() ||
     75	    machine_is_micro9m() ||
     76	    machine_is_micro9s() ||
     77	    machine_is_micro9m() ||
     78	    machine_is_micro9l() ||
     79	    machine_is_micro9s() ||
     80	    machine_is_sim_one() ||
     81	    machine_is_snapper_cl15() ||
     82	    machine_is_ts72xx() ||
     83	    machine_is_bk3() ||
     84	    machine_is_vision_ep9307())
     85		ep93xx_ethernet_reset();
     86}