cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

alphascale-asm9260.dtsi (1240B)

      1/*
      2 * Copyright 2014 Oleksij Rempel <linux@rempel-privat.de>
      3 *
      4 * Licensed under the X11 license or the GPL v2 (or later)
      5 */
      6
      7#include <dt-bindings/clock/alphascale,asm9260.h>
      8
      9/ {
     10	#address-cells = <1>;
     11	#size-cells = <1>;
     12	interrupt-parent = <&icoll>;
     13
     14	memory {
     15		device_type = "memory";
     16		reg = <0x20000000 0x2000000>;
     17	};
     18
     19	cpus {
     20		#address-cells = <0>;
     21		#size-cells = <0>;
     22
     23		cpu {
     24			compatible = "arm,arm926ej-s";
     25			device_type = "cpu";
     26			clocks = <&acc CLKID_SYS_CPU>;
     27		};
     28	};
     29
     30	osc24m: oscillator {
     31		compatible = "fixed-clock";
     32		#clock-cells = <0>;
     33		clock-frequency = <24000000>;
     34		clock-accuracy = <30000>;
     35	};
     36
     37	soc {
     38		#address-cells = <1>;
     39		#size-cells = <1>;
     40		compatible = "simple-bus";
     41		ranges;
     42
     43		acc: clock-controller@80040000 {
     44			compatible = "alphascale,asm9260-clock-controller";
     45			#clock-cells = <1>;
     46			clocks = <&osc24m>;
     47			reg = <0x80040000 0x204>;
     48		};
     49
     50		icoll: interrupt-controller@80054000 {
     51			compatible = "alphascale,asm9260-icoll";
     52			interrupt-controller;
     53			#interrupt-cells = <1>;
     54			reg = <0x80054000 0x200>;
     55		};
     56
     57		timer0: timer@80088000 {
     58			compatible = "alphascale,asm9260-timer";
     59			reg = <0x80088000 0x4000>;
     60			clocks = <&acc CLKID_AHB_TIMER0>;
     61			interrupts = <29>;
     62		};
     63	};
     64};