cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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am335x-boneblue.dts (15340B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
      4 */
      5/dts-v1/;
      6
      7#include "am33xx.dtsi"
      8#include "am335x-osd335x-common.dtsi"
      9#include <dt-bindings/interrupt-controller/irq.h>
     10
     11/ {
     12	model = "TI AM335x BeagleBone Blue";
     13	compatible = "ti,am335x-bone-blue", "ti,am33xx";
     14
     15	chosen {
     16		stdout-path = &uart0;
     17	};
     18
     19	leds {
     20		pinctrl-names = "default";
     21		pinctrl-0 = <&user_leds_s0>;
     22
     23		compatible = "gpio-leds";
     24
     25		usr_0_led {
     26			label = "beaglebone:green:usr0";
     27			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
     28			linux,default-trigger = "heartbeat";
     29			default-state = "off";
     30		};
     31
     32		usr_1_led {
     33			label = "beaglebone:green:usr1";
     34			gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
     35			linux,default-trigger = "mmc0";
     36			default-state = "off";
     37		};
     38
     39		usr_2_led {
     40			label = "beaglebone:green:usr2";
     41			gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
     42			linux,default-trigger = "cpu0";
     43			default-state = "off";
     44		};
     45
     46		usr_3_led {
     47			label = "beaglebone:green:usr3";
     48			gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
     49			linux,default-trigger = "mmc1";
     50			default-state = "off";
     51		};
     52
     53		wifi_led {
     54			label = "wifi";
     55			gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
     56			default-state = "off";
     57			linux,default-trigger = "phy0assoc";
     58		};
     59
     60		red_led {
     61			label = "red";
     62			gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
     63			default-state = "off";
     64		};
     65
     66		green_led {
     67			label = "green";
     68			gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
     69			default-state = "off";
     70		};
     71
     72		batt_1_led {
     73			label = "bat25";
     74			gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
     75			default-state = "off";
     76		};
     77
     78		batt_2_led {
     79			label = "bat50";
     80			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
     81			default-state = "off";
     82		};
     83
     84		batt_3_led {
     85			label = "bat75";
     86			gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
     87			default-state = "off";
     88		};
     89
     90		batt_4_led {
     91			label = "bat100";
     92			gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
     93			default-state = "off";
     94		};
     95	};
     96
     97	vmmcsd_fixed: fixedregulator0 {
     98		compatible = "regulator-fixed";
     99		regulator-name = "vmmcsd_fixed";
    100		regulator-min-microvolt = <3300000>;
    101		regulator-max-microvolt = <3300000>;
    102	};
    103
    104	wlan_en_reg: fixedregulator@2 {
    105		compatible = "regulator-fixed";
    106		regulator-name = "wlan-en-regulator";
    107		regulator-min-microvolt = <1800000>;
    108		regulator-max-microvolt = <1800000>;
    109		startup-delay-us= <70000>;
    110
    111		/* WL_EN */
    112		gpio = <&gpio3 9 0>;
    113		enable-active-high;
    114	};
    115};
    116
    117&am33xx_pinmux {
    118	user_leds_s0: user_leds_s0 {
    119		pinctrl-single,pins = <
    120			AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 */
    121			AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7) /* (U15) gpmc_a6.gpio1[22] - USR_LED_1 */
    122			AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7) /* (T15) gpmc_a7.gpio1[23] - USR_LED_2 */
    123			AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7) /* (V16) gpmc_a8.gpio1[24] - USR_LED_3 */
    124			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT, MUX_MODE7) /* (A15) xdma_event_intr0.gpio0[19] - WIFI_LED */
    125			AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE7) /* (R7) gpmc_advn_ale.gpio2[2] - P8.7, LED_RED, GP1_PIN_5 */
    126			AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE7) /* (T7) gpmc_oen_ren.gpio2[3] - P8.8, LED_GREEN, GP1_PIN_6 */
    127			AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE7) /* (U12) gpmc_ad11.gpio0[27] - P8.17, BATT_LED_1 */
    128			AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE7) /* (T5) lcd_data15.gpio0[11] - P8.32, BATT_LED_2 */
    129			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE7) /* (V6) gpmc_csn0.gpio1[29] - P8.26, BATT_LED_3 */
    130			AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7) /* (T11) gpmc_ad10.gpio0[26] - P8.14, BATT_LED_4 */
    131
    132		>;
    133	};
    134
    135	i2c2_pins: pinmux_i2c2_pins {
    136		pinctrl-single,pins = <
    137			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3)	/* (D18) uart1_ctsn.I2C2_SDA */
    138			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3)	/* (D17) uart1_rtsn.I2C2_SCL */
    139		>;
    140	};
    141
    142	/* UT0 */
    143	uart0_pins: pinmux_uart0_pins {
    144		pinctrl-single,pins = <
    145			AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
    146			AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
    147		>;
    148	};
    149
    150	/* UT1 */
    151	uart1_pins: pinmux_uart1_pins {
    152		pinctrl-single,pins = <
    153			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
    154			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
    155		>;
    156	};
    157
    158	/* GPS */
    159	uart2_pins: pinmux_uart2_pins {
    160		pinctrl-single,pins = <
    161			AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE1)	/* (A17) spi0_sclk.uart2_rxd */
    162			AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT_PULLDOWN, MUX_MODE1)	/* (B17) spi0_d0.uart2_txd */
    163		>;
    164	};
    165
    166	/* DSM2 */
    167	uart4_pins: pinmux_uart4_pins {
    168		pinctrl-single,pins = <
    169			AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6)	/* (T17) gpmc_wait0.uart4_rxd */
    170		>;
    171	};
    172
    173	/* UT5 */
    174	uart5_pins: pinmux_uart5_pins {
    175		pinctrl-single,pins = <
    176			AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_INPUT_PULLUP, MUX_MODE4)	/* (U2) lcd_data9.uart5_rxd */
    177			AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT_PULLDOWN, MUX_MODE4)	/* (U1) lcd_data8.uart5_txd */
    178		>;
    179	};
    180
    181	mmc1_pins: pinmux_mmc1_pins {
    182		pinctrl-single,pins = <
    183			AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7)		/* (C15) spi0_cs1.gpio0[6] */
    184		>;
    185	};
    186
    187	mmc2_pins: pinmux_mmc2_pins {
    188		pinctrl-single,pins = <
    189			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2)	/* (U9) gpmc_csn1.mmc1_clk */
    190			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2)	/* (V9) gpmc_csn2.mmc1_cmd */
    191			AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1)	/* (U7) gpmc_ad0.mmc1_dat0 */
    192			AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1)	/* (V7) gpmc_ad1.mmc1_dat1 */
    193			AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1)	/* (R8) gpmc_ad2.mmc1_dat2 */
    194			AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1)	/* (T8) gpmc_ad3.mmc1_dat3 */
    195			AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1)	/* (U8) gpmc_ad4.mmc1_dat4 */
    196			AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1)	/* (V8) gpmc_ad5.mmc1_dat5 */
    197			AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1)	/* (R9) gpmc_ad6.mmc1_dat6 */
    198			AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1)	/* (T9) gpmc_ad7.mmc1_dat7 */
    199		>;
    200	};
    201
    202	mmc3_pins: pinmux_mmc3_pins {
    203		pinctrl-single,pins = <
    204			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE6)	/* (L15) gmii1_rxd1.mmc2_clk */
    205			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLUP, MUX_MODE6)	/* (J16) gmii1_txen.mmc2_cmd */
    206			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE5)	/* (J17) gmii1_rxdv.mmc2_dat0 */
    207			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLUP, MUX_MODE5)	/* (J18) gmii1_txd3.mmc2_dat1 */
    208			AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLUP, MUX_MODE5)	/* (K15) gmii1_txd2.mmc2_dat2 */
    209			AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLUP, MUX_MODE5)	/* (H16) gmii1_col.mmc2_dat3 */
    210		>;
    211	};
    212
    213	bt_pins: pinmux_bt_pins {
    214		pinctrl-single,pins = <
    215			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* (K17) gmii1_txd0.gpio0[28] - BT_EN */
    216		>;
    217	};
    218
    219	uart3_pins: pinmux_uart3_pins {
    220		pinctrl-single,pins = <
    221			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1)	/* (L17) gmii1_rxd3.uart3_rxd */
    222			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE1)	/* (L16) gmii1_rxd2.uart3_txd */
    223			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT, MUX_MODE3)		/* (M17) mdio_data.uart3_ctsn */
    224			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLDOWN, MUX_MODE3)	/* (M18) mdio_clk.uart3_rtsn */
    225		>;
    226	};
    227
    228	wl18xx_pins: pinmux_wl18xx_pins {
    229		pinctrl-single,pins = <
    230			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7)	/* (K18) gmii1_txclk.gpio3[9] - WL_EN */
    231			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)	/* (K16) gmii1_txd1.gpio0[21] - WL_IRQ */
    232			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* (L18) gmii1_rxclk.gpio3[10] - LS_BUF_EN */
    233		>;
    234	};
    235
    236	/* DCAN */
    237	dcan1_pins: pinmux_dcan1_pins {
    238		pinctrl-single,pins = <
    239			AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT, MUX_MODE2)		/* (E17) uart0_rtsn.dcan1_rx */
    240			AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT, MUX_MODE2)		/* (E18) uart0_ctsn.dcan1_tx */
    241			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_OUTPUT, MUX_MODE7)		/* (M16) gmii1_rxd0.gpio2[21] */
    242		>;
    243	};
    244
    245	/* E1 */
    246	eqep0_pins: pinmux_eqep0_pins {
    247		pinctrl-single,pins = <
    248			AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_INPUT, MUX_MODE1)		/* (B12) mcasp0_aclkr.eQEP0A_in */
    249			AM33XX_PADCONF(AM335X_PIN_MCASP0_FSR, PIN_INPUT, MUX_MODE1)		/* (C13) mcasp0_fsr.eQEP0B_in */
    250		>;
    251	};
    252
    253	/* E2 */
    254	eqep1_pins: pinmux_eqep1_pins {
    255		pinctrl-single,pins = <
    256			AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_INPUT, MUX_MODE2)		/* (V2) lcd_data12.eQEP1A_in */
    257			AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_INPUT, MUX_MODE2)		/* (V3) lcd_data13.eQEP1B_in */
    258		>;
    259	};
    260
    261	/* E3 */
    262	eqep2_pins: pinmux_eqep2_pins {
    263		pinctrl-single,pins = <
    264			AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT, MUX_MODE4)		/* (T12) gpmc_ad12.eQEP2A_in */
    265			AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT, MUX_MODE4)		/* (R12) gpmc_ad13.eQEP2B_in */
    266		>;
    267	};
    268};
    269
    270&uart0 {
    271	pinctrl-names = "default";
    272	pinctrl-0 = <&uart0_pins>;
    273
    274	status = "okay";
    275};
    276
    277&uart1 {
    278	pinctrl-names = "default";
    279	pinctrl-0 = <&uart1_pins>;
    280
    281	status = "okay";
    282};
    283
    284&uart2 {
    285	pinctrl-names = "default";
    286	pinctrl-0 = <&uart2_pins>;
    287
    288	status = "okay";
    289};
    290
    291&uart4 {
    292	pinctrl-names = "default";
    293	pinctrl-0 = <&uart4_pins>;
    294
    295	status = "okay";
    296};
    297
    298&uart5 {
    299	pinctrl-names = "default";
    300	pinctrl-0 = <&uart5_pins>;
    301
    302	status = "okay";
    303};
    304
    305&usb0 {
    306	dr_mode = "peripheral";
    307	interrupts-extended = <&intc 18 &tps 0>;
    308	interrupt-names = "mc", "vbus";
    309};
    310
    311&usb1 {
    312	dr_mode = "host";
    313};
    314
    315&i2c0 {
    316	baseboard_eeprom: baseboard_eeprom@50 {
    317		compatible = "atmel,24c256";
    318		reg = <0x50>;
    319
    320		#address-cells = <1>;
    321		#size-cells = <1>;
    322		baseboard_data: baseboard_data@0 {
    323			reg = <0 0x100>;
    324		};
    325	};
    326};
    327
    328&i2c2 {
    329	pinctrl-names = "default";
    330	pinctrl-0 = <&i2c2_pins>;
    331
    332	status = "okay";
    333	clock-frequency = <400000>;
    334
    335	mpu9250@68 {
    336		compatible = "invensense,mpu9250";
    337		reg = <0x68>;
    338		interrupt-parent = <&gpio3>;
    339		interrupts = <21 IRQ_TYPE_EDGE_RISING>;
    340		i2c-gate {
    341			#address-cells = <1>;
    342			#size-cells = <0>;
    343			ax8975@c {
    344				compatible = "asahi-kasei,ak8975";
    345				reg = <0x0c>;
    346			};
    347		};
    348	};
    349
    350	pressure@76 {
    351		compatible = "bosch,bmp280";
    352		reg = <0x76>;
    353	};
    354};
    355
    356/include/ "tps65217.dtsi"
    357
    358&tps {
    359	/delete-property/ ti,pmic-shutdown-controller;
    360
    361	charger {
    362		interrupts = <0>, <1>;
    363		interrupt-names = "USB", "AC";
    364		status = "okay";
    365	};
    366};
    367
    368&mmc1 {
    369	status = "okay";
    370	vmmc-supply = <&vmmcsd_fixed>;
    371	bus-width = <4>;
    372	pinctrl-names = "default";
    373	pinctrl-0 = <&mmc1_pins>;
    374	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
    375};
    376
    377&mmc2 {
    378	status = "okay";
    379	vmmc-supply = <&vmmcsd_fixed>;
    380	bus-width = <8>;
    381	pinctrl-names = "default";
    382	pinctrl-0 = <&mmc2_pins>;
    383};
    384
    385&mmc3 {
    386	dmas = <&edma_xbar 12 0 1
    387		&edma_xbar 13 0 2>;
    388	dma-names = "tx", "rx";
    389	status = "okay";
    390	vmmc-supply = <&wlan_en_reg>;
    391	bus-width = <4>;
    392	non-removable;
    393	cap-power-off-card;
    394	keep-power-in-suspend;
    395	pinctrl-names = "default";
    396	pinctrl-0 = <&mmc3_pins &wl18xx_pins>;
    397
    398	#address-cells = <1>;
    399	#size-cells = <0>;
    400	wlcore: wlcore@2 {
    401		compatible = "ti,wl1835";
    402		reg = <2>;
    403		interrupt-parent = <&gpio0>;
    404		interrupts = <21 IRQ_TYPE_EDGE_RISING>;
    405	};
    406};
    407
    408&tscadc {
    409	status = "okay";
    410	adc {
    411		ti,adc-channels = <0 1 2 3 4 5 6 7>;
    412	};
    413};
    414
    415&uart3 {
    416	pinctrl-names = "default";
    417	pinctrl-0 = <&uart3_pins &bt_pins>;
    418	status = "okay";
    419
    420	bluetooth {
    421		compatible = "ti,wl1835-st";
    422		enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
    423	};
    424};
    425
    426&rtc {
    427	system-power-controller;
    428	clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
    429	clock-names = "ext-clk", "int-clk";
    430};
    431
    432&dcan1 {
    433	pinctrl-names = "default";
    434	pinctrl-0 = <&dcan1_pins>;
    435	status = "okay";
    436};
    437
    438&gpio0 {
    439	gpio-line-names =
    440		"UART3_CTS", /* M17 */
    441		"UART3_RTS", /* M18 */
    442		"UART2_RX", /* A17 */
    443		"UART2_TX", /* B17 */
    444		"I2C1_SDA", /* B16 */
    445		"I2C1_SCL", /* A16 */
    446		"MMC0_CD", /* C15 */
    447		"SPI1_SS2", /* C18 */
    448		"EQEP_1A", /* V2 */
    449		"EQEP_1B", /* V3 */
    450		"MDIR_2B", /* V4 */
    451		"BATT_LED_2", /* T5 */
    452		"I2C2_SDA", /* D18 */
    453		"I2C2_SCL", /* D17 */
    454		"UART1_RX", /* D16 */
    455		"UART1_TX", /* D15 */
    456		"MMC2_DAT1", /* J18 */
    457		"MMC2_DAT2", /* K15 */
    458		"NC", /* F16 */
    459		"WIFI_LED", /* A15 */
    460		"MOT_STBY", /* D14 */
    461		"WLAN_IRQ", /* K16 */
    462		"PWM_2A", /* U10 */
    463		"PWM_2B", /* T10 */
    464		"",
    465		"",
    466		"BATT_LED_4", /* T11 */
    467		"BATT_LED_1", /* U12 */
    468		"BT_EN", /* K17 */
    469		"SPI1_SS1", /* H18 */
    470		"UART4_RX", /* T17 */
    471		"MDIR_1B"; /* U17 */
    472};
    473
    474&gpio1 {
    475	gpio-line-names =
    476		"MMC1_DAT0", /* U7 */
    477		"MMC1_DAT1", /* V7 */
    478		"MMC1_DAT2", /* R8 */
    479		"MMC1_DAT3", /* T8 */
    480		"MMC1_DAT4", /* U8 */
    481		"MMC1_DAT5", /* V8 */
    482		"MMC1_DAT6", /* R9 */
    483		"MMC1_DAT7", /* T9 */
    484		"DCAN1_TX", /* E18 */
    485		"DCAN1_RX", /* E17 */
    486		"UART0_RX", /* E15 */
    487		"UART0_TX", /* E16 */
    488		"EQEP_2A", /* T12 */
    489		"EQEP_2B", /* R12 */
    490		"PRU_E_A", /* V13 */
    491		"PRU_E_B", /* U13 */
    492		"MDIR_2A", /* R13 */
    493		"GPIO1_17", /* V14 */
    494		"PWM_1A", /* U14 */
    495		"PWM_1B", /* T14 */
    496		"EMMC_RST", /* R14 */
    497		"USR_LED_0", /* V15 */
    498		"USR_LED_1", /* U15 */
    499		"USR_LED_2", /* T15 */
    500		"USR_LED_3", /* V16 */
    501		"GPIO1_25", /* U16 */
    502		"MCASP0_AXR0", /* T16 */
    503		"MCASP0_AXR1", /* V17 */
    504		"MCASP0_ACLKR", /* U18 */
    505		"BATT_LED_3", /* V6 */
    506		"MMC1_CLK", /* U9 */
    507		"MMC1_CMD"; /* V9 */
    508};
    509
    510&gpio2 {
    511	gpio-line-names =
    512		"MDIR_1A", /* T13 */
    513		"MCASP0_FSR", /* V12 */
    514		"LED_RED", /* R7 */
    515		"LED_GREEN", /* T7 */
    516		"MODE_BTN", /* U6 */
    517		"PAUSE_BTN", /* T6 */
    518		"MDIR_4A", /* R1 */
    519		"MDIR_4B", /* R2 */
    520		"MDIR_3B", /* R3 */
    521		"MDIR_3A", /* R4 */
    522		"SVO7", /* T1 */
    523		"SVO8", /* T2 */
    524		"SVO5", /* T3 */
    525		"SVO6", /* T4 */
    526		"UART5_TX", /* U1 */
    527		"UART5_RX", /* U2 */
    528		"SERVO_EN", /* U3 */
    529		"NC", /* U4 */
    530		"UART3_RX", /* L17 */
    531		"UART3_TX", /* L16 */
    532		"MMC2_CLK", /* L15 */
    533		"DCAN1_SILENT", /* M16 */
    534		"SVO1", /* U5 */
    535		"SVO3", /* R5 */
    536		"SVO2", /* V5 */
    537		"SVO4", /* R6 */
    538		"MMC0_DAT3", /* F17 */
    539		"MMC0_DAT2", /* F18 */
    540		"MMC0_DAT1", /* G15 */
    541		"MMC0_DAT0", /* G16 */
    542		"MMC0_CLK", /* G17 */
    543		"MMC0_CMD"; /* G18 */
    544};
    545
    546&gpio3 {
    547	gpio-line-names =
    548		"MMC2_DAT3", /* H16 */
    549		"GPIO3_1", /* H17 */
    550		"GPIO3_2", /* J15 */
    551		"MMC2_CMD", /* J16 */
    552		"MMC2_DAT0", /* J17 */
    553		"I2C0_SDA", /* C17 */
    554		"I2C0_SCL", /* C16 */
    555		"EMU1", /* C14 */
    556		"EMU0", /* B14 */
    557		"WL_EN", /* K18 */
    558		"WL_BT_OE", /* L18 */
    559		"",
    560		"",
    561		"NC", /* F15 */
    562		"SPI1_SCK", /* A13 */
    563		"SPI1_MISO", /* B13 */
    564		"SPI1_MOSI", /* D12 */
    565		"GPIO3_17", /* C12 */
    566		"EQEP_0A", /* B12 */
    567		"EQEP_0B", /* C13 */
    568		"GPIO3_20", /* D13 */
    569		"IMU_INT", /* A14 */
    570		"",
    571		"",
    572		"",
    573		"",
    574		"",
    575		"",
    576		"",
    577		"",
    578		"",
    579		"";
    580
    581	ls-buf-en-hog {
    582		gpio-hog;
    583		gpios = <10 GPIO_ACTIVE_HIGH>;
    584		output-high;
    585	};
    586};
    587
    588&epwmss0 {
    589	status = "okay";
    590};
    591
    592&eqep0 {
    593	pinctrl-names = "default";
    594	pinctrl-0 = <&eqep0_pins>;
    595	status = "okay";
    596};
    597
    598&epwmss1 {
    599	status = "okay";
    600};
    601
    602&eqep1 {
    603	pinctrl-names = "default";
    604	pinctrl-0 = <&eqep1_pins>;
    605	status = "okay";
    606};
    607
    608&epwmss2 {
    609	status = "okay";
    610};
    611
    612&eqep2 {
    613	pinctrl-names = "default";
    614	pinctrl-0 = <&eqep2_pins>;
    615	status = "okay";
    616};