cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
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am335x-guardian.dts (19293B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
      4 * Copyright (C) 2018 Robert Bosch Power Tools GmbH
      5 */
      6/dts-v1/;
      7
      8#include "am33xx.dtsi"
      9#include <dt-bindings/input/input.h>
     10#include <dt-bindings/interrupt-controller/irq.h>
     11
     12/ {
     13	model = "Bosch AM335x Guardian";
     14	compatible = "bosch,am335x-guardian", "ti,am33xx";
     15
     16	chosen {
     17		stdout-path = &uart0;
     18		tick-timer = &timer2;
     19	};
     20
     21	cpus {
     22		cpu@0 {
     23			cpu0-supply = <&dcdc2_reg>;
     24		};
     25	};
     26
     27	memory@80000000 {
     28		device_type = "memory";
     29		reg = <0x80000000 0x10000000>; /* 256 MB */
     30	};
     31
     32	guardian_buttons: gpio-keys {
     33		pinctrl-names = "default";
     34		pinctrl-0 = <&guardian_button_pins>;
     35		compatible = "gpio-keys";
     36		#address-cells = <1>;
     37		#size-cells = <0>;
     38
     39		select-button {
     40			label = "guardian-select-button";
     41			linux,code = <KEY_5>;
     42			gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
     43			wakeup-source;
     44		};
     45
     46		power-button {
     47			label = "guardian-power-button";
     48			linux,code = <KEY_POWER>;
     49			gpios = <&gpio2 21 GPIO_ACTIVE_LOW>;
     50			wakeup-source;
     51		};
     52	};
     53
     54	guardian_leds: gpio-leds {
     55		pinctrl-names = "default";
     56		pinctrl-0 = <&guardian_led_pins>;
     57		compatible = "gpio-leds";
     58
     59		life-led {
     60			label = "guardian:life-led";
     61			gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
     62			linux,default-trigger = "heartbeat";
     63			default-state = "off";
     64		};
     65	};
     66
     67	gpio-poweroff {
     68		compatible = "gpio-poweroff";
     69		gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
     70	};
     71
     72	panel {
     73		compatible = "ti,tilcdc,panel";
     74		pinctrl-names = "default", "sleep";
     75		pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>;
     76		pinctrl-1 = <&lcd_pins_sleep>;
     77
     78		display-timings {
     79			320x240 {
     80				hactive         = <320>;
     81				vactive         = <240>;
     82				hback-porch     = <68>;
     83				hfront-porch    = <20>;
     84				hsync-len       = <1>;
     85				vback-porch     = <18>;
     86				vfront-porch    = <4>;
     87				vsync-len       = <1>;
     88				clock-frequency = <9000000>;
     89				hsync-active    = <0>;
     90				vsync-active    = <0>;
     91			};
     92		};
     93		panel-info {
     94			ac-bias           = <255>;
     95			ac-bias-intrpt    = <0>;
     96			dma-burst-sz      = <16>;
     97			bpp               = <24>;
     98			bus-width         = <16>;
     99			fdd               = <0x80>;
    100			sync-edge         = <0>;
    101			sync-ctrl         = <1>;
    102			raster-order      = <0>;
    103			fifo-th           = <0>;
    104		};
    105
    106	};
    107
    108	guardian_beeper: dmtimer-pwm@7 {
    109		compatible = "ti,omap-dmtimer-pwm";
    110		ti,timers = <&timer7>;
    111		pinctrl-names = "default";
    112		pinctrl-0 = <&guardian_beeper_pins>;
    113		ti,clock-source = <0x01>;
    114	};
    115
    116	vmmcsd_fixed: fixedregulator0 {
    117		compatible = "regulator-fixed";
    118		regulator-name = "vmmcsd_fixed";
    119		regulator-min-microvolt = <3300000>;
    120		regulator-max-microvolt = <3300000>;
    121	};
    122
    123	mt_keypad: mt_keypad@0 {
    124		compatible = "gpio-mt-keypad";
    125		debounce-delay-ms = <10>;
    126		col-scan-delay-us = <2>;
    127		keypad,num-lines = <5>;
    128		linux,no-autorepeat;
    129		gpio-activelow;
    130		line-gpios = <
    131			&gpio1 24 GPIO_ACTIVE_LOW    /*gpio_56*/
    132			&gpio1 23 GPIO_ACTIVE_LOW    /*gpio_55*/
    133			&gpio1 22 GPIO_ACTIVE_LOW    /*gpio_54*/
    134			&gpio1 20 GPIO_ACTIVE_LOW    /*gpio_52*/
    135			&gpio1 16 GPIO_ACTIVE_LOW    /*gpio_48*/
    136		>;
    137	};
    138};
    139
    140&elm {
    141	status = "okay";
    142};
    143
    144&gpmc {
    145	pinctrl-names = "default";
    146	pinctrl-0 = <&nandflash_pins>;
    147	ranges = <0 0 0x08000000 0x1000000>;  /* CS0: 16MB for NAND */
    148	status = "okay";
    149
    150	nand@0,0 {
    151		compatible = "ti,omap2-nand";
    152		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
    153		interrupt-parent = <&gpmc>;
    154		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
    155			     <1 IRQ_TYPE_NONE>; /* termcount */
    156		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
    157		ti,nand-xfer-type = "prefetch-dma";
    158		ti,nand-ecc-opt = "bch16";
    159		ti,elm-id = <&elm>;
    160		nand-bus-width = <8>;
    161		gpmc,device-width = <1>;
    162		gpmc,sync-clk-ps = <0>;
    163		gpmc,cs-on-ns = <0>;
    164		gpmc,cs-rd-off-ns = <30>;
    165		gpmc,cs-wr-off-ns = <30>;
    166		gpmc,adv-on-ns = <0>;
    167		gpmc,adv-rd-off-ns = <30>;
    168		gpmc,adv-wr-off-ns = <30>;
    169		gpmc,we-on-ns = <0>;
    170		gpmc,we-off-ns = <15>;
    171		gpmc,oe-on-ns = <1>;
    172		gpmc,oe-off-ns = <15>;
    173		gpmc,access-ns = <30>;
    174		gpmc,rd-cycle-ns = <30>;
    175		gpmc,wr-cycle-ns = <30>;
    176		gpmc,bus-turnaround-ns = <0>;
    177		gpmc,cycle2cycle-delay-ns = <0>;
    178		gpmc,clk-activation-ns = <0>;
    179		gpmc,wr-access-ns = <0>;
    180		gpmc,wr-data-mux-bus-ns = <0>;
    181
    182		/*
    183		 * MTD partition table
    184		 *
    185		 * All SPL-* partitions are sized to minimal length which can
    186		 * be independently programmable. For NAND flash this is equal
    187		 * to size of erase-block.
    188		 */
    189		#address-cells = <1>;
    190		#size-cells = <1>;
    191
    192		partition@0 {
    193			label = "SPL";
    194			reg = <0x0 0x40000>;
    195		};
    196
    197		partition@1 {
    198			label = "SPL.backup1";
    199			reg = <0x40000  0x40000>;
    200		};
    201
    202		partition@2 {
    203			label = "SPL.backup2";
    204			reg = <0x80000  0x40000>;
    205		};
    206
    207		partition@3 {
    208			label = "SPL.backup3";
    209			reg = <0xc0000  0x40000>;
    210		};
    211
    212		partition@4 {
    213			label = "u-boot";
    214			reg = <0x100000 0x100000>;
    215		};
    216
    217		partition@5 {
    218			label = "u-boot.backup1";
    219			reg = <0x200000 0x100000>;
    220		};
    221
    222		partition@6 {
    223			label = "u-boot-2";
    224			reg = <0x300000 0x100000>;
    225		};
    226
    227		partition@7 {
    228			label = "u-boot-2.backup1";
    229			reg = <0x400000 0x100000>;
    230		};
    231
    232		partition@8 {
    233			label = "u-boot-env";
    234			reg = <0x500000 0x40000>;
    235		};
    236
    237		partition@9 {
    238			label = "u-boot-env.backup1";
    239			reg = <0x540000 0x40000>;
    240		};
    241
    242		partition@10 {
    243			label = "splash-screen";
    244			reg = <0x580000 0x40000>;
    245		};
    246
    247		partition@11 {
    248			label = "UBI";
    249			reg = <0x5c0000 0x1fa40000>;
    250		};
    251	};
    252};
    253
    254&i2c0 {
    255	pinctrl-names = "default";
    256	pinctrl-0 = <&i2c0_pins>;
    257	clock-frequency = <400000>;
    258	status = "okay";
    259
    260	tps: tps@24 {
    261		reg = <0x24>;
    262	};
    263};
    264
    265&lcdc {
    266	blue-and-red-wiring = "crossed";
    267	status = "okay";
    268	port {
    269		lcdc_0: endpoint@0 {
    270			remote-endpoint = <0>;
    271		};
    272	};
    273};
    274
    275&mmc1 {
    276	bus-width = <0x4>;
    277	pinctrl-names = "default";
    278	pinctrl-0 = <&mmc1_pins>;
    279	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
    280	vmmc-supply = <&vmmcsd_fixed>;
    281	status = "okay";
    282};
    283
    284&rtc {
    285	clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
    286	clock-names = "ext-clk", "int-clk";
    287};
    288
    289&spi0 {
    290	ti,pindir-d0-out-d1-in;
    291	pinctrl-names = "default";
    292	pinctrl-0 = <&spi0_pins>;
    293	status = "okay";
    294};
    295
    296#include "tps65217.dtsi"
    297
    298&tps {
    299  /*
    300   * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
    301   * mode") at poweroff.  Most BeagleBone versions do not support RTC-only
    302   * mode and risk hardware damage if this mode is entered.
    303   *
    304   * For details, see linux-omap mailing list May 2015 thread
    305   *  [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
    306   * In particular, messages:
    307   *  http://www.spinics.net/lists/linux-omap/msg118585.html
    308   *  http://www.spinics.net/lists/linux-omap/msg118615.html
    309   *
    310   * You can override this later with
    311   *  &tps {  /delete-property/ ti,pmic-shutdown-controller;  }
    312   * if you want to use RTC-only mode and made sure you are not affected
    313   * by the hardware problems. (Tip: double-check by performing a current
    314   * measurement after shutdown: it should be less than 1 mA.)
    315   */
    316	ti,pmic-shutdown-controller;
    317	interrupt-parent = <&intc>;
    318	interrupts = <7>; /* NMI */
    319
    320	backlight {
    321		isel = <1>;  /* 1 - ISET1, 2 ISET2 */
    322		fdim = <500>; /* TPS65217_BL_FDIM_500HZ */
    323		default-brightness = <50>;
    324		/* 1(on) - enable current sink, while initialization */
    325		/* 0(off) - disable current sink, while initialization */
    326		isink-en = <1>;
    327	};
    328
    329	regulators {
    330		dcdc1_reg: regulator@0 {
    331			regulator-name = "vdds_dpr";
    332			regulator-always-on;
    333		};
    334
    335		dcdc2_reg: regulator@1 {
    336			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
    337			regulator-name = "vdd_mpu";
    338			regulator-min-microvolt = <925000>;
    339			regulator-max-microvolt = <1351500>;
    340			regulator-boot-on;
    341			regulator-always-on;
    342		};
    343
    344		dcdc3_reg: regulator@2 {
    345			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
    346			regulator-name = "vdd_core";
    347			regulator-min-microvolt = <925000>;
    348			regulator-max-microvolt = <1150000>;
    349			regulator-boot-on;
    350			regulator-always-on;
    351		};
    352
    353		ldo1_reg: regulator@3 {
    354			regulator-name = "vio,vrtc,vdds";
    355			regulator-always-on;
    356		};
    357
    358		ldo2_reg: regulator@4 {
    359			regulator-name = "vdd_3v3aux";
    360			regulator-always-on;
    361		};
    362
    363		ldo3_reg: regulator@5 {
    364			regulator-name = "vdd_1v8";
    365			regulator-min-microvolt = <1800000>;
    366			regulator-max-microvolt = <1800000>;
    367			regulator-always-on;
    368		};
    369
    370		ldo4_reg: regulator@6 {
    371			regulator-name = "vdd_3v3a";
    372			regulator-always-on;
    373		};
    374	};
    375};
    376
    377&tscadc {
    378	status = "okay";
    379
    380	adc {
    381		ti,adc-channels = <0 1 2 3 4 5 6>;
    382	};
    383};
    384
    385&gpio0 {
    386	gpio-line-names =
    387		"",
    388		"",
    389		"",
    390		"",
    391		"",
    392		"",
    393		"",
    394		"",
    395		"",
    396		"",
    397		"",
    398		"",
    399		"",
    400		"",
    401		"",
    402		"",
    403		"",
    404		"",
    405		"",
    406		"",
    407		"",
    408		"",
    409		"",
    410		"",
    411		"",
    412		"",
    413		"",
    414		"",
    415		"",
    416		"MirxWakeup",
    417		"",
    418		"";
    419};
    420
    421&gpio3 {
    422	ti,gpio-always-on;
    423	ti,no-reset-on-init;
    424	gpio-line-names =
    425		"",
    426		"MirxBtReset",
    427		"",
    428		"CcVolAdcEn",
    429		"MirxBlePause",
    430		"",
    431		"",
    432		"",
    433		"",
    434		"",
    435		"",
    436		"",
    437		"",
    438		"",
    439		"AspEn",
    440		"",
    441		"",
    442		"",
    443		"",
    444		"",
    445		"",
    446		"BatVolAdcEn",
    447		"",
    448		"",
    449		"",
    450		"",
    451		"",
    452		"",
    453		"",
    454		"",
    455		"",
    456		"";
    457};
    458
    459&uart0 {
    460	pinctrl-names = "default";
    461	pinctrl-0 = <&uart0_pins>;
    462	status = "okay";
    463};
    464
    465&uart2 {
    466	pinctrl-names = "default";
    467	pinctrl-0 = <&uart2_pins>;
    468	status = "okay";
    469};
    470
    471&usb0 {
    472	dr_mode = "peripheral";
    473};
    474
    475&usb1 {
    476	dr_mode = "host";
    477	/delete-property/dmas;
    478	/delete-property/dma-names;
    479};
    480
    481&am33xx_pinmux {
    482	pinctrl-names = "default";
    483	pinctrl-0 = <&clkout2_pin &guardian_interface_pins>;
    484
    485	clkout2_pin: pinmux_clkout2_pin {
    486		pinctrl-single,pins = <
    487			/* xdma_event_intr1.clkout2 */
    488			AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
    489		>;
    490	};
    491
    492	guardian_interface_pins: pinmux_interface_pins {
    493		pinctrl-single,pins = <
    494			/* ADC_BATSENSE_EN */
    495			/* (A14) MCASP0_AHCLKx.gpio3[21] */
    496			AM33XX_IOPAD(0x9ac, PIN_OUTPUT_PULLDOWN | MUX_MODE7 )
    497			/* ADC_COINCELL_EN */
    498			/* (J16) MII1_TX_EN.gpio3[3] */
    499			AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE7 )
    500			/* ASP_ENABLE */
    501			/* (A13) MCASP0_ACLKx.gpio3[14] */
    502			AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLUP | MUX_MODE7)
    503			/* (D16) uart1_rxd.uart1_rxd */
    504			AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE7)
    505			/* (D15) uart1_txd.uart1_txd */
    506			AM33XX_IOPAD(0x984, PIN_INPUT | MUX_MODE7)
    507			/*SWITCH-OFF_3V6*/
    508			/* (M18) gpio0[1] */
    509			AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE7)
    510			/* MIRACULIX */
    511			/* (H17) gmii1_crs.gpio3[1] */
    512			AM33XX_IOPAD(0x90c, PIN_OUTPUT_PULLDOWN | MUX_MODE7 )
    513			/* (H18) rmii1_refclk.gpio0[29] */
    514			AM33XX_IOPAD(0x944, PIN_OUTPUT_PULLDOWN | MUX_MODE7 )
    515			/* (J18) gmii1_txd3.gpio0[16] */
    516			AM33XX_IOPAD(0x91c, PIN_INPUT           | MUX_MODE7 )
    517			/* (J17) gmii1_rxdv.gpio3[4] */
    518			AM33XX_IOPAD(0x918, PIN_OUTPUT_PULLDOWN | MUX_MODE7 )
    519		>;
    520	};
    521
    522	guardian_beeper_pins: pinmux_dmtimer7_pins {
    523		pinctrl-single,pins = <
    524			AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5) /* (E18) timer7 */
    525		>;
    526	};
    527
    528	guardian_button_pins: pinmux_guardian_button_pins {
    529		pinctrl-single,pins = <
    530			AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE7) /* (M16) gmii1_rxd0.gpio2[21] */
    531			AM33XX_IOPAD(0x884, PIN_INPUT | MUX_MODE7) /* (V9)  gpmc_csn2.gpio1[31] */
    532		>;
    533	};
    534
    535
    536	i2c0_pins: pinmux_i2c0_pins {
    537		pinctrl-single,pins = <
    538			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
    539			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
    540		>;
    541	};
    542
    543	led_bl_pins: gpio_led_bl_pins {
    544		pinctrl-single,pins = <
    545			/* P9_14, gpmc_a[2].GPIO1[18] (backlight control) */
    546			AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE7)
    547		>;
    548	};
    549
    550	lcd_disen_pins: pinmux_lcd_disen_pins {
    551		pinctrl-single,pins = <
    552			/* P9_27, mcasp0_fsr.gpio3[19] (lcd_disen) */
    553			AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLUP | SLEWCTRL_SLOW | MUX_MODE7)
    554		>;
    555	};
    556
    557	lcd_pins_default: pinmux_lcd_pins_default {
    558		pinctrl-single,pins = <
    559			/* (U10) gpmc_ad8.lcd_data23 */
    560			AM33XX_IOPAD(0x820, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
    561			/* (T10) gpmc_ad9.lcd_data22 */
    562			AM33XX_IOPAD(0x824, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
    563			/* (T11) gpmc_ad10.lcd_data21 */
    564			AM33XX_IOPAD(0x828, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
    565			/* (U12) gpmc_ad11.lcd_data20 */
    566			AM33XX_IOPAD(0x82c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
    567			/* (T12) gpmc_ad12.lcd_data19 */
    568			AM33XX_IOPAD(0x830, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
    569			/* (R12) gpmc_ad13.lcd_data18 */
    570			AM33XX_IOPAD(0x834, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
    571			/* (V13) gpmc_ad14.lcd_data17 */
    572			AM33XX_IOPAD(0x838, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
    573			/* (U13) gpmc_ad15.lcd_data16 */
    574			AM33XX_IOPAD(0x83c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
    575			/* lcd_data0.lcd_data0 */
    576			AM33XX_IOPAD(0x8a0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
    577			/* lcd_data1.lcd_data1 */
    578			AM33XX_IOPAD(0x8a4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
    579			/* lcd_data2.lcd_data2 */
    580			AM33XX_IOPAD(0x8a8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
    581			/* lcd_data3.lcd_data3 */
    582			AM33XX_IOPAD(0x8ac, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
    583			/* lcd_data4.lcd_data4 */
    584			AM33XX_IOPAD(0x8b0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
    585			/* lcd_data5.lcd_data5 */
    586			AM33XX_IOPAD(0x8b4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
    587			/* lcd_data6.lcd_data6 */
    588			AM33XX_IOPAD(0x8b8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
    589			/* lcd_data7.lcd_data7 */
    590			AM33XX_IOPAD(0x8bc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
    591			/* lcd_data8.lcd_data8 */
    592			AM33XX_IOPAD(0x8c0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
    593			/* lcd_data9.lcd_data9 */
    594			AM33XX_IOPAD(0x8c4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
    595			/* lcd_data10.lcd_data10 */
    596			AM33XX_IOPAD(0x8c8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
    597			/* lcd_data11.lcd_data11 */
    598			AM33XX_IOPAD(0x8cc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
    599			/* lcd_data12.lcd_data12 */
    600			AM33XX_IOPAD(0x8d0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
    601			/* lcd_data13.lcd_data13 */
    602			AM33XX_IOPAD(0x8d4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
    603			/* lcd_data14.lcd_data14 */
    604			AM33XX_IOPAD(0x8d8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
    605			/* lcd_data15.lcd_data15 */
    606			AM33XX_IOPAD(0x8dc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
    607			/* lcd_vsync.lcd_vsync */
    608			AM33XX_IOPAD(0x8e0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
    609			/* lcd_hsync.lcd_hsync */
    610			AM33XX_IOPAD(0x8e4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
    611			/* lcd_pclk.lcd_pclk */
    612			AM33XX_IOPAD(0x8e8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
    613			/* lcd_ac_bias_en.lcd_ac_bias_en */
    614			AM33XX_IOPAD(0x8ec, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
    615		>;
    616	};
    617
    618	lcd_pins_sleep: pinmux_lcd_pins_sleep {
    619		pinctrl-single,pins = <
    620			/* lcd_data0.lcd_data0 */
    621			AM33XX_IOPAD(0x8a0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
    622			/* lcd_data1.lcd_data1 */
    623			AM33XX_IOPAD(0x8a4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
    624			/* lcd_data2.lcd_data2 */
    625			AM33XX_IOPAD(0x8a8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
    626			/* lcd_data3.lcd_data3 */
    627			AM33XX_IOPAD(0x8ac, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
    628			/* lcd_data4.lcd_data4 */
    629			AM33XX_IOPAD(0x8b0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
    630			/* lcd_data5.lcd_data5 */
    631			AM33XX_IOPAD(0x8b4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
    632			/* lcd_data6.lcd_data6 */
    633			AM33XX_IOPAD(0x8b8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
    634			/* lcd_data7.lcd_data7 */
    635			AM33XX_IOPAD(0x8bc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
    636			/* lcd_data8.lcd_data8 */
    637			AM33XX_IOPAD(0x8c0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
    638			/* lcd_data9.lcd_data9 */
    639			AM33XX_IOPAD(0x8c4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
    640			/* lcd_data10.lcd_data10 */
    641			AM33XX_IOPAD(0x8c8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
    642			/* lcd_data11.lcd_data11 */
    643			AM33XX_IOPAD(0x8cc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
    644			/* lcd_data12.lcd_data12 */
    645			AM33XX_IOPAD(0x8d0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
    646			/* lcd_data13.lcd_data13 */
    647			AM33XX_IOPAD(0x8d4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
    648			/* lcd_data14.lcd_data14 */
    649			AM33XX_IOPAD(0x8d8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
    650			/* lcd_data15.lcd_data15 */
    651			AM33XX_IOPAD(0x8dc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
    652			/* lcd_vsync.lcd_vsync */
    653			AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
    654			/* lcd_hsync.lcd_hsync */
    655			AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
    656			/* lcd_pclk.lcd_pclk */
    657			AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
    658			/* lcd_ac_bias_en.lcd_ac_bias_en */
    659			AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
    660		>;
    661	};
    662
    663	guardian_led_pins: pinmux_guardian_led_pins {
    664		pinctrl-single,pins = <
    665			AM33XX_IOPAD(0x868, PIN_OUTPUT | MUX_MODE7) /* (T16) gpmc_a10.gpio1[26] */
    666		>;
    667	};
    668
    669	mmc1_pins: pinmux_mmc1_pins {
    670		pinctrl-single,pins = <
    671			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc0_dat3.mmc0_dat3 */
    672			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc0_dat2.mmc0_dat2 */
    673			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc0_dat1.mmc0_dat1 */
    674			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc0_dat0.mmc0_dat0 */
    675			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc0_clk.mmc0_clk */
    676			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc0_cmd.mmc0_cmd */
    677			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)         /* GPIO0_6 */
    678		>;
    679	};
    680
    681	spi0_pins: pinmux_spi0_pins {
    682		pinctrl-single,pins = <
    683			/* SPI0_CLK  - spi0_clk.spi */
    684			AM33XX_IOPAD(0x950, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
    685			/* SPI0_MOSI - spi0_d0.spi0 */
    686			AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLUP | MUX_MODE0)
    687			/* SPI0_MISO - spi0_d1.spi0 */
    688			AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0)
    689			/* SPI0_CS0 - spi */
    690			AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0)
    691		>;
    692	};
    693
    694	uart0_pins: pinmux_uart0_pins {
    695		pinctrl-single,pins = <
    696			/* uart0_rxd.uart0_rxd */
    697			AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)
    698			/* uart0_txd.uart0_txd */
    699			AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
    700		>;
    701	};
    702
    703	uart2_pins: pinmux_uart2_pins {
    704		pinctrl-single,pins = <
    705			/* K18 uart2_rxd.mirx_txd */
    706			AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE1)
    707			/* L18 uart2_txd.mirx_rxd */
    708			AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLDOWN | MUX_MODE1)
    709		>;
    710	};
    711
    712	nandflash_pins: pinmux_nandflash_pins {
    713		pinctrl-single,pins = <
    714			/* (U7) gpmc_ad0.gpmc_ad0 */
    715			AM33XX_IOPAD(0x800, PIN_INPUT | MUX_MODE0)
    716			/* (V7) gpmc_ad1.gpmc_ad1 */
    717			AM33XX_IOPAD(0x804, PIN_INPUT | MUX_MODE0)
    718			/* (R8) gpmc_ad2.gpmc_ad2 */
    719			AM33XX_IOPAD(0x808, PIN_INPUT | MUX_MODE0)
    720			/* (T8) gpmc_ad3.gpmc_ad3 */
    721			AM33XX_IOPAD(0x80c, PIN_INPUT | MUX_MODE0)
    722			/* (U8) gpmc_ad4.gpmc_ad4 */
    723			AM33XX_IOPAD(0x810, PIN_INPUT | MUX_MODE0)
    724			/* (V8) gpmc_ad5.gpmc_ad5 */
    725			AM33XX_IOPAD(0x814, PIN_INPUT | MUX_MODE0)
    726			/* (R9) gpmc_ad6.gpmc_ad6 */
    727			AM33XX_IOPAD(0x818, PIN_INPUT | MUX_MODE0)
    728			/* (T9) gpmc_ad7.gpmc_ad7 */
    729			AM33XX_IOPAD(0x81c, PIN_INPUT | MUX_MODE0)
    730			/* (T17) gpmc_wait0.gpmc_wait0 */
    731			AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE0)
    732			/* (U17) gpmc_wpn.gpmc_wpn */
    733			AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE0)
    734			/* (V6) gpmc_csn0.gpmc_csn0 */
    735			AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)
    736			/* (R7) gpmc_advn_ale.gpmc_advn_ale */
    737			AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)
    738			/* (T7) gpmc_oen_ren.gpmc_oen_ren */
    739			AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)
    740			/* (U6) gpmc_wen.gpmc_wen */
    741			AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)
    742			/* (T6) gpmc_be0n_cle.gpmc_be0n_cle */
    743			AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)
    744		>;
    745	};
    746};