cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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am335x-sancloud-bbe-extended-wifi.dts (2871B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Copyright (C) 2021 Sancloud Ltd
      4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
      5 */
      6/dts-v1/;
      7
      8#include "am33xx.dtsi"
      9#include "am335x-bone-common.dtsi"
     10#include "am335x-boneblack-common.dtsi"
     11#include "am335x-sancloud-bbe-common.dtsi"
     12#include <dt-bindings/interrupt-controller/irq.h>
     13
     14/ {
     15	model = "SanCloud BeagleBone Enhanced Extended WiFi";
     16	compatible = "sancloud,am335x-boneenhanced",
     17		     "ti,am335x-bone-black",
     18		     "ti,am335x-bone",
     19		     "ti,am33xx";
     20
     21	wlan_en_reg: fixedregulator@2 {
     22		compatible = "regulator-fixed";
     23		regulator-name = "wlan-en-regulator";
     24		regulator-min-microvolt = <3300000>;
     25		regulator-max-microvolt = <3300000>;
     26		startup-delay-us= <100000>;
     27	};
     28};
     29
     30&am33xx_pinmux {
     31	mmc3_pins: pinmux_mmc3_pins {
     32		pinctrl-single,pins = <
     33			/* gpmc_a9.gpio1_25: RADIO_EN */
     34			AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_OUTPUT_PULLUP, MUX_MODE7)
     35
     36			/* gpmc_ad12.mmc2_dat0 */
     37			AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE3)
     38
     39			/* gpmc_ad13.mmc2_dat1 */
     40			AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE3)
     41
     42			/* gpmc_ad14.mmc2_dat2 */
     43			AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE3)
     44
     45			/* gpmc_ad15.mmc2_dat3 */
     46			AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE3)
     47
     48			/* gpmc_csn3.mmc2_cmd */
     49			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT_PULLUP, MUX_MODE3)
     50
     51			/* gpmc_clk.mmc2_clk */
     52			AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE3)
     53		>;
     54	};
     55
     56	bluetooth_pins: pinmux_bluetooth_pins {
     57		pinctrl-single,pins = <
     58			/* event_intr0.gpio0_19 */
     59			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_INPUT_PULLUP, MUX_MODE7)
     60		>;
     61	};
     62
     63	uart1_pins: pinmux_uart1_pins {
     64		pinctrl-single,pins = <
     65			/* uart1_rxd */
     66			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0)
     67
     68			/* uart1_txd */
     69			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE0)
     70
     71			/* uart1_ctsn */
     72			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0)
     73
     74			/* uart1_rtsn */
     75			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
     76		>;
     77	};
     78};
     79
     80&i2c2 {
     81	status = "disabled";
     82};
     83
     84&mmc3 {
     85	status = "okay";
     86	vmmc-supply = <&wlan_en_reg>;
     87	bus-width = <4>;
     88	non-removable;
     89	cap-power-off-card;
     90	ti,needs-special-hs-handling;
     91	keep-power-in-suspend;
     92	pinctrl-names = "default";
     93	pinctrl-0 = <&mmc3_pins>;
     94	dmas = <&edma_xbar 12 0 1
     95		&edma_xbar 13 0 2>;
     96	dma-names = "tx", "rx";
     97	clock-frequency = <50000000>;
     98	max-frequency = <50000000>;
     99};
    100
    101&uart1 {
    102	status = "okay";
    103
    104	bluetooth {
    105		pinctrl-names = "default";
    106		pinctrl-0 = <&uart1_pins &bluetooth_pins>;
    107		compatible = "qcom,qca6174-bt";
    108		enable-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
    109		clocks = <&l4ls_clkctrl AM3_L4LS_UART2_CLKCTRL 0>;
    110		interrupt-parent = <&gpio0>;
    111		interrupts = <19 IRQ_TYPE_EDGE_RISING>;
    112	};
    113};