cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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am335x-sancloud-bbe-lite.dts (1115B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
      4 * Copyright (C) 2021 SanCloud Ltd
      5 */
      6/dts-v1/;
      7
      8#include "am33xx.dtsi"
      9#include "am335x-bone-common.dtsi"
     10#include "am335x-boneblack-common.dtsi"
     11#include "am335x-sancloud-bbe-common.dtsi"
     12
     13/ {
     14	model = "SanCloud BeagleBone Enhanced Lite";
     15	compatible = "sancloud,am335x-boneenhanced",
     16		     "ti,am335x-bone-black",
     17		     "ti,am335x-bone",
     18		     "ti,am33xx";
     19};
     20
     21&am33xx_pinmux {
     22	bb_spi0_pins: pinmux_bb_spi0_pins {
     23		pinctrl-single,pins = <
     24			AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE0)
     25			AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT, MUX_MODE0)
     26			AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT, MUX_MODE0)
     27			AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT, MUX_MODE0)
     28		>;
     29	};
     30};
     31
     32&spi0 {
     33	#address-cells = <1>;
     34	#size-cells = <0>;
     35
     36	status = "okay";
     37	pinctrl-names = "default";
     38	pinctrl-0 = <&bb_spi0_pins>;
     39
     40	channel@0 {
     41		#address-cells = <1>;
     42		#size-cells = <0>;
     43
     44		compatible = "micron,spi-authenta";
     45
     46		reg = <0>;
     47		spi-max-frequency = <16000000>;
     48		spi-cpha;
     49	};
     50};