am3517-evm.dts (10625B)
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 4 */ 5/dts-v1/; 6 7#include "am3517.dtsi" 8#include "am3517-som.dtsi" 9#include "am3517-evm-ui.dtsi" 10#include <dt-bindings/input/input.h> 11 12/ { 13 model = "TI AM3517 EVM (AM3517/05 TMDSEVM3517)"; 14 compatible = "ti,am3517-evm", "ti,am3517", "ti,omap3"; 15 16 aliases { 17 display0 = &lcd0; 18 }; 19 20 chosen { 21 stdout-path = &uart3; 22 }; 23 24 memory@80000000 { 25 device_type = "memory"; 26 reg = <0x80000000 0x10000000>; /* 256 MB */ 27 }; 28 29 vmmc_fixed: vmmc { 30 compatible = "regulator-fixed"; 31 regulator-name = "vmmc_fixed"; 32 regulator-min-microvolt = <3300000>; 33 regulator-max-microvolt = <3300000>; 34 }; 35 36 gpio-keys { 37 compatible = "gpio-keys-polled"; 38 poll-interval = <100>; 39 40 user_pb { 41 label = "User Push Button"; 42 linux,code = <BTN_0>; 43 gpios = <&tca6416 5 GPIO_ACTIVE_LOW>; 44 }; 45 46 user_sw_1 { 47 label = "User Switch 1"; 48 linux,code = <BTN_1>; 49 gpios = <&tca6416 8 GPIO_ACTIVE_LOW>; 50 }; 51 52 user_sw_2 { 53 label = "User Switch 2"; 54 linux,code = <BTN_2>; 55 gpios = <&tca6416 9 GPIO_ACTIVE_LOW>; 56 }; 57 58 user_sw_3 { 59 label = "User Switch 3"; 60 linux,code = <BTN_3>; 61 gpios = <&tca6416 10 GPIO_ACTIVE_LOW>; 62 }; 63 64 user_sw_4 { 65 label = "User Switch 4"; 66 linux,code = <BTN_4>; 67 gpios = <&tca6416 11 GPIO_ACTIVE_LOW>; 68 }; 69 70 user_sw_5 { 71 label = "User Switch 5"; 72 linux,code = <BTN_5>; 73 gpios = <&tca6416 12 GPIO_ACTIVE_LOW>; 74 }; 75 76 user_sw_6 { 77 label = "User Switch 6"; 78 linux,code = <BTN_6>; 79 gpios = <&tca6416 13 GPIO_ACTIVE_LOW>; 80 }; 81 82 user_sw_7 { 83 label = "User Switch 7"; 84 linux,code = <BTN_7>; 85 gpios = <&tca6416 14 GPIO_ACTIVE_LOW>; 86 }; 87 88 user_sw_8 { 89 label = "User Switch 8"; 90 linux,code = <BTN_8>; 91 gpios = <&tca6416 15 GPIO_ACTIVE_LOW>; 92 }; 93 }; 94 95 gpio-leds { 96 compatible = "gpio-leds"; 97 98 pinctrl-names = "default"; 99 pinctrl-0 = <&leds_pins>; 100 101 user_led_1 { 102 label = "am3517evm:green:user_led_1"; 103 gpios = <&tca6416 7 GPIO_ACTIVE_LOW>; 104 default-state = "on"; 105 }; 106 107 user_led_2 { 108 label = "am3517evm:green:user_led_2"; 109 gpios = <&tca6416 6 GPIO_ACTIVE_LOW>; 110 default-state = "on"; 111 }; 112 113 user_led_3 { 114 label = "am3517evm:green:user_led_3"; 115 gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; 116 linux,default-trigger = "mmc0"; /* SD/MMC card activity */ 117 }; 118 119 user_led_4 { 120 label = "am3517evm:green:user_led_4"; 121 gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>; 122 linux,default-trigger = "heartbeat"; 123 }; 124 }; 125 126 lcd0: display@0 { 127 /* This isn't the exact LCD, but the timings meet spec */ 128 /* To make it work, set CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=4 */ 129 compatible = "newhaven,nhd-4.3-480272ef-atxl"; 130 label = "15"; 131 backlight = <&bl>; 132 enable-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>; /* gpio176, lcd INI */ 133 vcc-supply = <&vdd_io_reg>; 134 135 port { 136 lcd_in: endpoint { 137 remote-endpoint = <&dpi_out>; 138 }; 139 }; 140 }; 141 142 bl: backlight { 143 compatible = "pwm-backlight"; 144 pinctrl-names = "default"; 145 power-supply = <&vdd_io_reg>; 146 pinctrl-0 = <&backlight_pins>; 147 pwms = <&pwm11 0 5000000 0>; 148 brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; 149 default-brightness-level = <7>; 150 enable-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* gpio_182 */ 151 }; 152 153 pwm11: dmtimer-pwm@11 { 154 compatible = "ti,omap-dmtimer-pwm"; 155 pinctrl-names = "default"; 156 pinctrl-0 = <&pwm_pins>; 157 ti,timers = <&timer11>; 158 #pwm-cells = <3>; 159 ti,clock-source = <0x01>; 160 }; 161 162 /* HS USB Host PHY on PORT 1 */ 163 hsusb1_phy: hsusb1_phy { 164 pinctrl-names = "default"; 165 pinctrl-0 = <&hsusb1_rst_pins>; 166 compatible = "usb-nop-xceiv"; 167 reset-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>; /* gpio_57 */ 168 #phy-cells = <0>; 169 }; 170}; 171 172&davinci_emac { 173 pinctrl-names = "default"; 174 pinctrl-0 = <ðernet_pins>; 175 status = "okay"; 176}; 177 178&davinci_mdio { 179 status = "okay"; 180}; 181 182&dss { 183 status = "okay"; 184 185 pinctrl-names = "default"; 186 pinctrl-0 = <&dss_dpi_pins>; 187 188 vdds_dsi-supply = <&vdd_io_reg>; 189 vdda_video-supply = <&vdd_io_reg>; 190 191 port { 192 dpi_out: endpoint { 193 remote-endpoint = <&lcd_in>; 194 data-lines = <16>; 195 }; 196 }; 197}; 198 199&i2c2 { 200 pinctrl-names = "default"; 201 pinctrl-0 = <&i2c2_pins>; 202 clock-frequency = <400000>; 203 /* User DIP swithes [1:8] / User LEDS [1:2] */ 204 tca6416: gpio@21 { 205 compatible = "ti,tca6416"; 206 reg = <0x21>; 207 gpio-controller; 208 #gpio-cells = <2>; 209 vcc-supply = <&vdd_io_reg>; 210 }; 211}; 212 213&i2c3 { 214 pinctrl-names = "default"; 215 pinctrl-0 = <&i2c3_pins>; 216 clock-frequency = <400000>; 217}; 218 219&mmc1 { 220 status = "okay"; 221 pinctrl-names = "default"; 222 pinctrl-0 = <&mmc1_pins>; 223 vmmc-supply = <&vmmc_fixed>; 224 bus-width = <4>; 225 wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; /* gpio_126 */ 226 cd-gpios = <&gpio4 31 GPIO_ACTIVE_LOW>; /* gpio_127 */ 227}; 228 229&mmc3 { 230 status = "disabled"; 231}; 232 233&usbhshost { 234 pinctrl-names = "default"; 235 pinctrl-0 = <&hsusb1_pins>; 236 port1-mode = "ehci-phy"; 237}; 238 239&usbhsehci { 240 phys = <&hsusb1_phy>; 241}; 242 243&omap3_pmx_core { 244 245 ethernet_pins: pinmux_ethernet_pins { 246 pinctrl-single,pins = < 247 OMAP3_CORE1_IOPAD(0x21fe, PIN_INPUT | MUX_MODE0) /* rmii_mdio_data */ 248 OMAP3_CORE1_IOPAD(0x2200, MUX_MODE0) /* rmii_mdio_clk */ 249 OMAP3_CORE1_IOPAD(0x2202, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_rxd0 */ 250 OMAP3_CORE1_IOPAD(0x2204, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_rxd1 */ 251 OMAP3_CORE1_IOPAD(0x2206, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_crs_dv */ 252 OMAP3_CORE1_IOPAD(0x2208, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_rxer */ 253 OMAP3_CORE1_IOPAD(0x220a, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_txd0 */ 254 OMAP3_CORE1_IOPAD(0x220c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_txd1 */ 255 OMAP3_CORE1_IOPAD(0x220e, PIN_OUTPUT_PULLDOWN |MUX_MODE0) /* rmii_txen */ 256 OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50mhz_clk */ 257 >; 258 }; 259 260 i2c2_pins: pinmux_i2c2_pins { 261 pinctrl-single,pins = < 262 OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */ 263 OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */ 264 >; 265 }; 266 267 i2c3_pins: pinmux_i2c3_pins { 268 pinctrl-single,pins = < 269 OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */ 270 OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */ 271 >; 272 }; 273 274 leds_pins: pinmux_leds_pins { 275 pinctrl-single,pins = < 276 OMAP3_WKUP_IOPAD(0x2a24, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu0.gpio_11 */ 277 OMAP3_WKUP_IOPAD(0x2a26, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu1.gpio_31 */ 278 >; 279 }; 280 281 mmc1_pins: pinmux_mmc1_pins { 282 pinctrl-single,pins = < 283 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ 284 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ 285 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ 286 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ 287 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ 288 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ 289 OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE4) /* sdmmc1_dat4.gpio_126 */ 290 OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE4) /* sdmmc1_dat5.gpio_127 */ 291 >; 292 }; 293 294 pwm_pins: pinmux_pwm_pins { 295 pinctrl-single,pins = < 296 OMAP3_CORE1_IOPAD(0x21dc, PIN_OUTPUT | MUX_MODE1) /* mcspi2_cs0.gpt11_pwm */ 297 >; 298 }; 299 300 backlight_pins: pinmux_backlight_pins { 301 pinctrl-single,pins = < 302 OMAP3_CORE1_IOPAD(0x21de, PIN_OUTPUT | MUX_MODE4) /* mcspi2_cs1.gpio_182 */ 303 >; 304 }; 305 306 dss_dpi_pins: pinmux_dss_dpi_pins { 307 pinctrl-single,pins = < 308 OMAP3_CORE1_IOPAD(0x21d2, PIN_OUTPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */ 309 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ 310 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ 311 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */ 312 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */ 313 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */ 314 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */ 315 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */ 316 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */ 317 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */ 318 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */ 319 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */ 320 OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */ 321 OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */ 322 OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */ 323 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */ 324 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */ 325 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */ 326 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */ 327 OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */ 328 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */ 329 >; 330 }; 331 332 hsusb1_rst_pins: pinmux_hsusb1_rst_pins { 333 pinctrl-single,pins = < 334 OMAP3_CORE1_IOPAD(0x20ba, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs6.gpio_57 */ 335 >; 336 }; 337}; 338 339&omap3_pmx_core2 { 340 341 hsusb1_pins: pinmux_hsusb1_pins { 342 pinctrl-single,pins = < 343 OMAP3430_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */ 344 OMAP3430_CORE2_IOPAD(0x25da, PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */ 345 OMAP3430_CORE2_IOPAD(0x25ec, PIN_INPUT | MUX_MODE3) /* etk_d8.hsusb1_dir */ 346 OMAP3430_CORE2_IOPAD(0x25ee, PIN_INPUT | MUX_MODE3) /* etk_d9.hsusb1_nxt */ 347 OMAP3430_CORE2_IOPAD(0x25dc, PIN_INPUT | MUX_MODE3) /* etk_d0.hsusb1_data0 */ 348 OMAP3430_CORE2_IOPAD(0x25de, PIN_INPUT | MUX_MODE3) /* etk_d1.hsusb1_data1 */ 349 OMAP3430_CORE2_IOPAD(0x25e0, PIN_INPUT | MUX_MODE3) /* etk_d2.hsusb1_data2 */ 350 OMAP3430_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE3) /* etk_d7.hsusb1_data3 */ 351 OMAP3430_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE3) /* etk_d4.hsusb1_data4 */ 352 OMAP3430_CORE2_IOPAD(0x25e6, PIN_INPUT | MUX_MODE3) /* etk_d5.hsusb1_data5 */ 353 OMAP3430_CORE2_IOPAD(0x25e8, PIN_INPUT | MUX_MODE3) /* etk_d6.hsusb1_data6 */ 354 OMAP3430_CORE2_IOPAD(0x25e2, PIN_INPUT | MUX_MODE3) /* etk_d3.hsusb1_data7 */ 355 >; 356 }; 357};