cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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am437x-sbc-t43.dts (5334B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Copyright (C) 2015 CompuLab, Ltd. - http://www.compulab.co.il/
      4 */
      5
      6#include "am437x-cm-t43.dts"
      7#include "compulab-sb-som.dtsi"
      8
      9/ {
     10	model = "CompuLab CM-T43 on SB-SOM-T43";
     11	compatible = "compulab,am437x-sbc-t43", "compulab,am437x-cm-t43", "ti,am4372", "ti,am43";
     12
     13	aliases {
     14		display0 = &lcd0;
     15	};
     16};
     17
     18&am43xx_pinmux {
     19	mmc1_pins: pinmux_mmc1_pins {
     20		pinctrl-single,pins = <
     21			AM4372_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
     22			AM4372_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
     23			AM4372_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
     24			AM4372_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
     25			AM4372_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
     26			AM4372_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
     27			AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
     28			AM4372_IOPAD(0x964, PIN_INPUT | MUX_MODE7) /* ecap0_in_pwm0_out.gpio0_7 */
     29		>;
     30	};
     31
     32	dss_pinctrl_default: dss_pinctrl_default {
     33		pinctrl-single,pins = <
     34			AM4372_IOPAD(0x9b0, PIN_OUTPUT_PULLUP | MUX_MODE2) /* cam0 hd -> DSS DATA 23 */
     35			AM4372_IOPAD(0x9b4, PIN_OUTPUT_PULLUP | MUX_MODE2)
     36			AM4372_IOPAD(0x9b8, PIN_OUTPUT_PULLUP | MUX_MODE2)
     37			AM4372_IOPAD(0x9bc, PIN_OUTPUT_PULLUP | MUX_MODE2)
     38			AM4372_IOPAD(0x9c0, PIN_OUTPUT_PULLUP | MUX_MODE2)
     39			AM4372_IOPAD(0x9c4, PIN_OUTPUT_PULLUP | MUX_MODE2)
     40			AM4372_IOPAD(0x9c8, PIN_OUTPUT_PULLUP | MUX_MODE2)
     41			AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLUP | MUX_MODE2) /* cam1 data 9 -> DSS DATA 16 */
     42
     43			AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
     44			AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
     45			AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
     46			AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
     47			AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
     48			AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
     49			AM4372_IOPAD(0x8b8, PIN_OUTPUT_PULLUP | MUX_MODE0)
     50			AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
     51			AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
     52			AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
     53			AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
     54			AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
     55			AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
     56			AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
     57			AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
     58			AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
     59			AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
     60			AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
     61			AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
     62			AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
     63			AM4372_IOPAD(0xa20, PIN_OUTPUT_PULLUP | MUX_MODE7)
     64		>;
     65	};
     66
     67	uart0_pins_default: uart0_pins_default {
     68		pinctrl-single,pins = <
     69			AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0)
     70			AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0)
     71			AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */
     72			AM4372_IOPAD(0x974, PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */
     73		>;
     74	};
     75
     76	i2c1_pins: i2c1_pins {
     77		pinctrl-single,pins = <
     78			AM4372_IOPAD(0xa6c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE1)  /* spi2_cs0.i2c1_sda  */
     79			AM4372_IOPAD(0xa60, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE1)  /* spi2_sclk.i2c1_scl */
     80		>;
     81	};
     82
     83	i2c2_pins: i2c2_pins {
     84		pinctrl-single,pins = <
     85			AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE3)  /* uart1_ctsn.i2c2_sda  */
     86			AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE3)  /* uart1_rtsn.i2c2_scl */
     87		>;
     88	};
     89
     90	usb2_phy1_default: usb2_phy1_default {
     91		pinctrl-single,pins = <
     92			AM4372_IOPAD(0xac0, DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE0)
     93		>;
     94	};
     95
     96	usb2_phy2_default: usb2_phy2_default {
     97		pinctrl-single,pins = <
     98			AM4372_IOPAD(0xac4, DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE0)
     99		>;
    100	};
    101};
    102
    103&i2c1 {
    104	status = "okay";
    105	pinctrl-names = "default";
    106	pinctrl-0 = <&i2c1_pins>;
    107
    108	pca9555: pca9555@20 {
    109		compatible = "nxp,pca9555";
    110		reg = <0x20>;
    111		gpio-controller;
    112		#gpio-cells = <2>;
    113	};
    114
    115	eeprom_base: at24@50 {
    116		compatible = "atmel,24c02";
    117		reg = <0x50>;
    118		pagesize = <16>;
    119	};
    120};
    121
    122&i2c2 {
    123	status = "okay";
    124	pinctrl-names = "default";
    125	pinctrl-0 = <&i2c2_pins>;
    126};
    127
    128&mmc1 {
    129	status = "okay";
    130	bus-width = <4>;
    131	pinctrl-names = "default";
    132	pinctrl-0 = <&mmc1_pins>;
    133	vmmc-supply = <&vsb_3v3>;
    134	cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
    135	wp-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
    136};
    137
    138&dss {
    139	status = "okay";
    140
    141	pinctrl-names = "default";
    142	pinctrl-0 = <&dss_pinctrl_default>;
    143
    144	port {
    145		dpi_lcd_out: endpoint {
    146			remote-endpoint = <&lcd_in>;
    147			data-lines = <24>;
    148		};
    149	};
    150};
    151
    152&uart0 {
    153	pinctrl-names = "default";
    154	pinctrl-0 = <&uart0_pins_default>;
    155};
    156
    157&dwc3_1 {
    158	pinctrl-names = "default";
    159	pinctrl-0 = <&usb2_phy1_default>;
    160};
    161
    162&dwc3_2 {
    163	pinctrl-names = "default";
    164	pinctrl-0 = <&usb2_phy2_default>;
    165};
    166
    167&lcd0 {
    168	enable-gpios = <&pca9555 14 GPIO_ACTIVE_HIGH
    169			&gpio4 28 GPIO_ACTIVE_HIGH>;
    170
    171	port {
    172		lcd_in: endpoint {
    173			remote-endpoint = <&dpi_lcd_out>;
    174			data-lines = <24>;
    175		};
    176	};
    177};