am437x-sk-evm.dts (25660B)
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/ 4 */ 5 6/* AM437x SK EVM */ 7 8/dts-v1/; 9 10#include "am4372.dtsi" 11#include <dt-bindings/pinctrl/am43xx.h> 12#include <dt-bindings/pwm/pwm.h> 13#include <dt-bindings/gpio/gpio.h> 14#include <dt-bindings/input/input.h> 15#include <dt-bindings/interrupt-controller/irq.h> 16 17/ { 18 model = "TI AM437x SK EVM"; 19 compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43"; 20 21 aliases { 22 display0 = &lcd0; 23 }; 24 25 chosen { 26 stdout-path = &uart0; 27 }; 28 29 /* fixed 32k external oscillator clock */ 30 clk_32k_rtc: clk_32k_rtc { 31 #clock-cells = <0>; 32 compatible = "fixed-clock"; 33 clock-frequency = <32768>; 34 }; 35 36 lcd_bl: backlight { 37 compatible = "pwm-backlight"; 38 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>; 39 brightness-levels = <0 51 53 56 62 75 101 152 255>; 40 default-brightness-level = <8>; 41 }; 42 43 sound { 44 compatible = "simple-audio-card"; 45 simple-audio-card,name = "AM437x-SK-EVM"; 46 simple-audio-card,widgets = 47 "Headphone", "Headphone Jack", 48 "Line", "Line In"; 49 simple-audio-card,routing = 50 "Headphone Jack", "HPLOUT", 51 "Headphone Jack", "HPROUT", 52 "LINE1L", "Line In", 53 "LINE1R", "Line In"; 54 simple-audio-card,format = "dsp_b"; 55 simple-audio-card,bitclock-master = <&sound_master>; 56 simple-audio-card,frame-master = <&sound_master>; 57 simple-audio-card,bitclock-inversion; 58 59 simple-audio-card,cpu { 60 sound-dai = <&mcasp1>; 61 }; 62 63 sound_master: simple-audio-card,codec { 64 sound-dai = <&tlv320aic3106>; 65 system-clock-frequency = <24000000>; 66 }; 67 }; 68 69 matrix_keypad: matrix_keypad0 { 70 compatible = "gpio-matrix-keypad"; 71 72 pinctrl-names = "default"; 73 pinctrl-0 = <&matrix_keypad_pins>; 74 75 debounce-delay-ms = <5>; 76 col-scan-delay-us = <5>; 77 78 row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */ 79 &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */ 80 81 col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */ 82 &gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */ 83 84 linux,keymap = < 85 MATRIX_KEY(0, 0, KEY_DOWN) 86 MATRIX_KEY(0, 1, KEY_RIGHT) 87 MATRIX_KEY(1, 0, KEY_LEFT) 88 MATRIX_KEY(1, 1, KEY_UP) 89 >; 90 }; 91 92 leds { 93 compatible = "gpio-leds"; 94 95 pinctrl-names = "default"; 96 pinctrl-0 = <&leds_pins>; 97 98 led0 { 99 label = "am437x-sk:red:heartbeat"; 100 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */ 101 linux,default-trigger = "heartbeat"; 102 default-state = "off"; 103 }; 104 105 led1 { 106 label = "am437x-sk:green:mmc1"; 107 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */ 108 linux,default-trigger = "mmc0"; 109 default-state = "off"; 110 }; 111 112 led2 { 113 label = "am437x-sk:blue:cpu0"; 114 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */ 115 linux,default-trigger = "cpu0"; 116 default-state = "off"; 117 }; 118 119 led3 { 120 label = "am437x-sk:blue:usr3"; 121 gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */ 122 default-state = "off"; 123 }; 124 }; 125 126 lcd0: display { 127 compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi"; 128 label = "lcd"; 129 130 pinctrl-names = "default"; 131 pinctrl-0 = <&lcd_pins>; 132 133 backlight = <&lcd_bl>; 134 135 enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; 136 137 port { 138 lcd_in: endpoint { 139 remote-endpoint = <&dpi_out>; 140 }; 141 }; 142 }; 143 144 vmmcwl_fixed: fixedregulator-mmcwl { 145 /* 146 * WL_EN is not SDIO standard compliant. It is an out of band 147 * signal and hard to be dealt with in a standard way by the 148 * SDIO core driver. 149 * So modelling the WL_EN line as a regulator was a natural 150 * choice as the MMC core already deals with MMC supplies. 151 */ 152 compatible = "regulator-fixed"; 153 regulator-name = "vmmcwl_fixed"; 154 regulator-min-microvolt = <1800000>; 155 regulator-max-microvolt = <1800000>; 156 gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>; 157 enable-active-high; 158 }; 159}; 160 161&am43xx_pinmux { 162 matrix_keypad_pins: matrix_keypad_pins { 163 pinctrl-single,pins = < 164 AM4372_IOPAD(0xa4c, PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */ 165 AM4372_IOPAD(0xa50, PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */ 166 AM4372_IOPAD(0xa54, PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */ 167 AM4372_IOPAD(0xa58, PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */ 168 >; 169 }; 170 171 leds_pins: leds_pins { 172 pinctrl-single,pins = < 173 AM4372_IOPAD(0xa28, PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */ 174 AM4372_IOPAD(0xa2c, PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */ 175 AM4372_IOPAD(0xa30, PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */ 176 AM4372_IOPAD(0xa34, PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */ 177 >; 178 }; 179 180 i2c0_pins: i2c0_pins { 181 pinctrl-single,pins = < 182 AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 183 AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 184 >; 185 }; 186 187 i2c1_pins: i2c1_pins { 188 pinctrl-single,pins = < 189 AM4372_IOPAD(0x95c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */ 190 AM4372_IOPAD(0x958, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */ 191 >; 192 }; 193 194 mmc1_pins: pinmux_mmc1_pins { 195 pinctrl-single,pins = < 196 AM4372_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ 197 AM4372_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ 198 AM4372_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ 199 AM4372_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ 200 AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ 201 AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ 202 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ 203 >; 204 }; 205 206 ecap0_pins: backlight_pins { 207 pinctrl-single,pins = < 208 AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */ 209 >; 210 }; 211 212 edt_ft5306_ts_pins: edt_ft5306_ts_pins { 213 pinctrl-single,pins = < 214 AM4372_IOPAD(0x874, PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */ 215 AM4372_IOPAD(0x878, PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */ 216 >; 217 }; 218 219 vpfe0_pins_default: vpfe0_pins_default { 220 pinctrl-single,pins = < 221 AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/ 222 AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/ 223 AM4372_IOPAD(0x9b8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/ 224 AM4372_IOPAD(0x9bc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/ 225 AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/ 226 AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/ 227 AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/ 228 AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/ 229 AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/ 230 AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/ 231 AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/ 232 AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/ 233 AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/ 234 AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/ 235 AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/ 236 >; 237 }; 238 239 vpfe0_pins_sleep: vpfe0_pins_sleep { 240 pinctrl-single,pins = < 241 AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 242 AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 243 AM4372_IOPAD(0x9b8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 244 AM4372_IOPAD(0x9bc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 245 AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 246 AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 247 AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 248 AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 249 AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 250 AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 251 AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 252 AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 253 AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 254 AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 255 AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 256 >; 257 }; 258 259 clkout1_pin: pinmux_clkout1_pin { 260 pinctrl-single,pins = < 261 0x270 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* XDMA_EVENT_INTR0/CLKOUT1 */ 262 >; 263 }; 264 265 cpsw_default: cpsw_default { 266 pinctrl-single,pins = < 267 /* Slave 1 */ 268 AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */ 269 AM4372_IOPAD(0x914, PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ 270 AM4372_IOPAD(0x928, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ 271 AM4372_IOPAD(0x924, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ 272 AM4372_IOPAD(0x920, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ 273 AM4372_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ 274 AM4372_IOPAD(0x930, PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ 275 AM4372_IOPAD(0x918, PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ 276 AM4372_IOPAD(0x940, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ 277 AM4372_IOPAD(0x93c, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ 278 AM4372_IOPAD(0x938, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ 279 AM4372_IOPAD(0x934, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ 280 281 /* Slave 2 */ 282 AM4372_IOPAD(0x858, PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ 283 AM4372_IOPAD(0x840, PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ 284 AM4372_IOPAD(0x854, PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ 285 AM4372_IOPAD(0x850, PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ 286 AM4372_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ 287 AM4372_IOPAD(0x848, PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ 288 AM4372_IOPAD(0x85c, PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ 289 AM4372_IOPAD(0x844, PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */ 290 AM4372_IOPAD(0x86c, PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ 291 AM4372_IOPAD(0x868, PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ 292 AM4372_IOPAD(0x864, PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ 293 AM4372_IOPAD(0x860, PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ 294 >; 295 }; 296 297 cpsw_sleep: cpsw_sleep { 298 pinctrl-single,pins = < 299 /* Slave 1 reset value */ 300 AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7) 301 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) 302 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) 303 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) 304 AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7) 305 AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7) 306 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7) 307 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) 308 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) 309 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) 310 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7) 311 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7) 312 313 /* Slave 2 reset value */ 314 AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7) 315 AM4372_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7) 316 AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7) 317 AM4372_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7) 318 AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7) 319 AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7) 320 AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7) 321 AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7) 322 AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7) 323 AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7) 324 AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7) 325 AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7) 326 >; 327 }; 328 329 davinci_mdio_default: davinci_mdio_default { 330 pinctrl-single,pins = < 331 /* MDIO */ 332 AM4372_IOPAD(0x948, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 333 AM4372_IOPAD(0x94c, PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */ 334 >; 335 }; 336 337 davinci_mdio_sleep: davinci_mdio_sleep { 338 pinctrl-single,pins = < 339 /* MDIO reset value */ 340 AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) 341 AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) 342 >; 343 }; 344 345 dss_pins: dss_pins { 346 pinctrl-single,pins = < 347 AM4372_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */ 348 AM4372_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1) 349 AM4372_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1) 350 AM4372_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1) 351 AM4372_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1) 352 AM4372_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1) 353 AM4372_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1) 354 AM4372_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */ 355 AM4372_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */ 356 AM4372_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) 357 AM4372_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) 358 AM4372_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) 359 AM4372_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) 360 AM4372_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) 361 AM4372_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) 362 AM4372_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) 363 AM4372_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) 364 AM4372_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) 365 AM4372_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) 366 AM4372_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) 367 AM4372_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) 368 AM4372_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) 369 AM4372_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) 370 AM4372_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */ 371 AM4372_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */ 372 AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */ 373 AM4372_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */ 374 AM4372_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */ 375 376 >; 377 }; 378 379 qspi_pins: qspi_pins { 380 pinctrl-single,pins = < 381 AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */ 382 AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */ 383 AM4372_IOPAD(0x890, PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */ 384 AM4372_IOPAD(0x894, PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */ 385 AM4372_IOPAD(0x898, PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */ 386 AM4372_IOPAD(0x89c, PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */ 387 >; 388 }; 389 390 mcasp1_pins: mcasp1_pins { 391 pinctrl-single,pins = < 392 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ 393 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ 394 AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ 395 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ 396 >; 397 }; 398 399 mcasp1_pins_sleep: mcasp1_pins_sleep { 400 pinctrl-single,pins = < 401 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7) 402 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7) 403 AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7) 404 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) 405 >; 406 }; 407 408 lcd_pins: lcd_pins { 409 pinctrl-single,pins = < 410 AM4372_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */ 411 >; 412 }; 413 414 usb1_pins: usb1_pins { 415 pinctrl-single,pins = < 416 AM4372_IOPAD(0xac0, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ 417 >; 418 }; 419 420 usb2_pins: usb2_pins { 421 pinctrl-single,pins = < 422 AM4372_IOPAD(0xac4, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ 423 >; 424 }; 425 426 mmc3_pins_default: pinmux_mmc3_pins_default { 427 pinctrl-single,pins = < 428 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD21) cam1_data2.mmc2_clk */ 429 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE22) cam1_data3.mmc2_cmd */ 430 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD22) cam1_data4.mmc2_dat0 */ 431 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE23) cam1_data5.mmc2_dat1 */ 432 AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD23) cam1_data6.mmc2_dat2 */ 433 AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE24) cam1_data7.mmc2_dat3 */ 434 >; 435 }; 436 437 mmc3_pins_sleep: pinmux_mmc3_pins_sleep { 438 pinctrl-single,pins = < 439 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD21) cam1_data2.mmc2_clk */ 440 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE22) cam1_data3.mmc2_cmd */ 441 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD22) cam1_data4.mmc2_dat0 */ 442 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE23) cam1_data5.mmc2_dat1 */ 443 AM4372_IOPAD(0xa00, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD23) cam1_data6.mmc2_dat2 */ 444 AM4372_IOPAD(0xa04, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE24) cam1_data7.mmc2_dat3 */ 445 >; 446 }; 447 448 wlan_pins_default: pinmux_wlan_pins_default { 449 pinctrl-single,pins = < 450 AM4372_IOPAD(0x9d0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data8.gpio4_8 WL_EN */ 451 AM4372_IOPAD(0x9e4, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* cam1_wen.gpio4_13 WL_IRQ */ 452 >; 453 }; 454 455 wlan_pins_sleep: pinmux_wlan_pins_sleep { 456 pinctrl-single,pins = < 457 AM4372_IOPAD(0x9d0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data8.gpio4_8 WL_EN */ 458 AM4372_IOPAD(0x9e4, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* cam1_wen.gpio4_13 WL_IRQ */ 459 >; 460 }; 461 462 uart1_bt_pins_default: pinmux_uart1_bt_pins_default { 463 pinctrl-single,pins = < 464 AM4372_IOPAD(0x980, PIN_INPUT | MUX_MODE0) /* uart1_rxd.uart1_rxd */ 465 AM4372_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */ 466 AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */ 467 AM4372_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */ 468 AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data9.gpio4_7 BT_EN */ 469 >; 470 }; 471 472 uart1_bt_pins_sleep: pinmux_uart1_bt_pins_sleep { 473 pinctrl-single,pins = < 474 AM4372_IOPAD(0x980, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_rxd.uart1_rxd */ 475 AM4372_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_txd.uart1_txd */ 476 AM4372_IOPAD(0x978, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_ctsn.uart1_ctsn */ 477 AM4372_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_rtsn.uart1_rtsn */ 478 AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLUP | MUX_MODE7) /* cam1_data9.gpio4_7 BT_EN */ 479 >; 480 }; 481}; 482 483&i2c0 { 484 status = "okay"; 485 pinctrl-names = "default"; 486 pinctrl-0 = <&i2c0_pins>; 487 clock-frequency = <100000>; 488 489 tps@24 { 490 compatible = "ti,tps65218"; 491 reg = <0x24>; 492 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 493 interrupt-controller; 494 #interrupt-cells = <2>; 495 496 dcdc1: regulator-dcdc1 { 497 /* VDD_CORE limits min of OPP50 and max of OPP100 */ 498 regulator-name = "vdd_core"; 499 regulator-min-microvolt = <912000>; 500 regulator-max-microvolt = <1144000>; 501 regulator-boot-on; 502 regulator-always-on; 503 }; 504 505 dcdc2: regulator-dcdc2 { 506 /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */ 507 regulator-name = "vdd_mpu"; 508 regulator-min-microvolt = <912000>; 509 regulator-max-microvolt = <1378000>; 510 regulator-boot-on; 511 regulator-always-on; 512 }; 513 514 dcdc3: regulator-dcdc3 { 515 regulator-name = "vdds_ddr"; 516 regulator-boot-on; 517 regulator-always-on; 518 regulator-state-mem { 519 regulator-on-in-suspend; 520 }; 521 regulator-state-disk { 522 regulator-off-in-suspend; 523 }; 524 }; 525 526 dcdc4: regulator-dcdc4 { 527 regulator-name = "v3_3d"; 528 regulator-min-microvolt = <3300000>; 529 regulator-max-microvolt = <3300000>; 530 regulator-boot-on; 531 regulator-always-on; 532 }; 533 534 dcdc5: regulator-dcdc5 { 535 compatible = "ti,tps65218-dcdc5"; 536 regulator-name = "v1_0bat"; 537 regulator-min-microvolt = <1000000>; 538 regulator-max-microvolt = <1000000>; 539 regulator-boot-on; 540 regulator-always-on; 541 regulator-state-mem { 542 regulator-on-in-suspend; 543 }; 544 }; 545 546 dcdc6: regulator-dcdc6 { 547 compatible = "ti,tps65218-dcdc6"; 548 regulator-name = "v1_8bat"; 549 regulator-min-microvolt = <1800000>; 550 regulator-max-microvolt = <1800000>; 551 regulator-boot-on; 552 regulator-always-on; 553 regulator-state-mem { 554 regulator-on-in-suspend; 555 }; 556 }; 557 558 ldo1: regulator-ldo1 { 559 regulator-name = "v1_8d"; 560 regulator-min-microvolt = <1800000>; 561 regulator-max-microvolt = <1800000>; 562 regulator-boot-on; 563 regulator-always-on; 564 }; 565 566 power-button { 567 compatible = "ti,tps65218-pwrbutton"; 568 status = "okay"; 569 interrupts = <3 IRQ_TYPE_EDGE_BOTH>; 570 }; 571 }; 572 573 at24@50 { 574 compatible = "atmel,24c256"; 575 pagesize = <64>; 576 reg = <0x50>; 577 }; 578}; 579 580&i2c1 { 581 status = "okay"; 582 pinctrl-names = "default"; 583 pinctrl-0 = <&i2c1_pins>; 584 clock-frequency = <400000>; 585 586 ov2659@30 { 587 compatible = "ovti,ov2659"; 588 reg = <0x30>; 589 pinctrl-names = "default"; 590 pinctrl-0 = <&clkout1_pin>; 591 592 clocks = <&clkout1_mux_ck>; 593 clock-names = "xvclk"; 594 assigned-clocks = <&clkout1_mux_ck>; 595 assigned-clock-parents = <&clkout1_osc_div_ck>; 596 597 port { 598 ov2659_1: endpoint { 599 remote-endpoint = <&vpfe0_ep>; 600 link-frequencies = /bits/ 64 <70000000>; 601 }; 602 }; 603 }; 604 605 edt-ft5306@38 { 606 status = "okay"; 607 compatible = "edt,edt-ft5306", "edt,edt-ft5x06"; 608 pinctrl-names = "default"; 609 pinctrl-0 = <&edt_ft5306_ts_pins>; 610 611 reg = <0x38>; 612 interrupt-parent = <&gpio0>; 613 interrupts = <31 IRQ_TYPE_EDGE_FALLING>; 614 615 reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>; 616 617 touchscreen-size-x = <480>; 618 touchscreen-size-y = <272>; 619 620 wakeup-source; 621 }; 622 623 tlv320aic3106: tlv320aic3106@1b { 624 #sound-dai-cells = <0>; 625 compatible = "ti,tlv320aic3106"; 626 reg = <0x1b>; 627 status = "okay"; 628 629 /* Regulators */ 630 AVDD-supply = <&dcdc4>; 631 IOVDD-supply = <&dcdc4>; 632 DRVDD-supply = <&dcdc4>; 633 DVDD-supply = <&ldo1>; 634 }; 635 636 lis331dlh@18 { 637 compatible = "st,lis331dlh"; 638 reg = <0x18>; 639 status = "okay"; 640 641 Vdd-supply = <&dcdc4>; 642 Vdd_IO-supply = <&dcdc4>; 643 interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>; 644 }; 645}; 646 647&epwmss0 { 648 status = "okay"; 649}; 650 651&ecap0 { 652 status = "okay"; 653 pinctrl-names = "default"; 654 pinctrl-0 = <&ecap0_pins>; 655}; 656 657&gpio0 { 658 status = "okay"; 659}; 660 661&gpio1 { 662 status = "okay"; 663}; 664 665&gpio4 { 666 status = "okay"; 667}; 668 669&gpio5 { 670 status = "okay"; 671}; 672 673&mmc1 { 674 status = "okay"; 675 pinctrl-names = "default"; 676 pinctrl-0 = <&mmc1_pins>; 677 678 vmmc-supply = <&dcdc4>; 679 bus-width = <4>; 680 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 681}; 682 683&uart1 { 684 status = "okay"; 685 pinctrl-names = "default", "sleep"; 686 pinctrl-0 = <&uart1_bt_pins_default>; 687 pinctrl-1 = <&uart1_bt_pins_sleep>; 688}; 689 690&mmc3 { 691 status = "okay"; 692 /* 693 * these are on the crossbar and are outlined in the 694 * xbar-event-map element 695 */ 696 dmas = <&edma_xbar 30 0 1>, 697 <&edma_xbar 31 0 2>; 698 dma-names = "tx", "rx"; 699 vmmc-supply = <&vmmcwl_fixed>; 700 bus-width = <4>; 701 pinctrl-names = "default", "sleep"; 702 pinctrl-0 = <&mmc3_pins_default>; 703 pinctrl-1 = <&mmc3_pins_sleep>; 704 cap-power-off-card; 705 keep-power-in-suspend; 706 non-removable; 707 708 #address-cells = <1>; 709 #size-cells = <0>; 710 wlcore: wlcore@2 { 711 compatible = "ti,wl1835"; 712 pinctrl-names = "default", "sleep"; 713 pinctrl-0 = <&wlan_pins_default>; 714 pinctrl-1 = <&wlan_pins_sleep>; 715 reg = <2>; 716 interrupt-parent = <&gpio4>; 717 interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; 718 }; 719}; 720 721&usb2_phy1 { 722 status = "okay"; 723}; 724 725&usb1 { 726 dr_mode = "otg"; 727 status = "okay"; 728 pinctrl-names = "default"; 729 pinctrl-0 = <&usb1_pins>; 730}; 731 732&usb2_phy2 { 733 status = "okay"; 734}; 735 736&usb2 { 737 dr_mode = "host"; 738 status = "okay"; 739 pinctrl-names = "default"; 740 pinctrl-0 = <&usb2_pins>; 741}; 742 743&qspi { 744 status = "okay"; 745 pinctrl-names = "default"; 746 pinctrl-0 = <&qspi_pins>; 747 748 spi-max-frequency = <48000000>; 749 flash@0 { 750 compatible = "mx66l51235l"; 751 spi-max-frequency = <48000000>; 752 reg = <0>; 753 spi-cpol; 754 spi-cpha; 755 spi-tx-bus-width = <1>; 756 spi-rx-bus-width = <4>; 757 #address-cells = <1>; 758 #size-cells = <1>; 759 760 /* MTD partition table. 761 * The ROM checks the first 512KiB 762 * for a valid file to boot(XIP). 763 */ 764 partition@0 { 765 label = "QSPI.U_BOOT"; 766 reg = <0x00000000 0x000080000>; 767 }; 768 partition@1 { 769 label = "QSPI.U_BOOT.backup"; 770 reg = <0x00080000 0x00080000>; 771 }; 772 partition@2 { 773 label = "QSPI.U-BOOT-SPL_OS"; 774 reg = <0x00100000 0x00010000>; 775 }; 776 partition@3 { 777 label = "QSPI.U_BOOT_ENV"; 778 reg = <0x00110000 0x00010000>; 779 }; 780 partition@4 { 781 label = "QSPI.U-BOOT-ENV.backup"; 782 reg = <0x00120000 0x00010000>; 783 }; 784 partition@5 { 785 label = "QSPI.KERNEL"; 786 reg = <0x00130000 0x0800000>; 787 }; 788 partition@6 { 789 label = "QSPI.FILESYSTEM"; 790 reg = <0x00930000 0x36D0000>; 791 }; 792 }; 793}; 794 795&mac_sw { 796 pinctrl-names = "default", "sleep"; 797 pinctrl-0 = <&cpsw_default>; 798 pinctrl-1 = <&cpsw_sleep>; 799 status = "okay"; 800}; 801 802&davinci_mdio_sw { 803 pinctrl-names = "default", "sleep"; 804 pinctrl-0 = <&davinci_mdio_default>; 805 pinctrl-1 = <&davinci_mdio_sleep>; 806 807 ethphy0: ethernet-phy@4 { 808 reg = <4>; 809 }; 810 811 ethphy1: ethernet-phy@5 { 812 reg = <5>; 813 }; 814}; 815 816&cpsw_port1 { 817 phy-handle = <ðphy0>; 818 phy-mode = "rgmii-rxid"; 819 ti,dual-emac-pvid = <1>; 820}; 821 822&cpsw_port2 { 823 phy-handle = <ðphy1>; 824 phy-mode = "rgmii-rxid"; 825 ti,dual-emac-pvid = <2>; 826}; 827 828&elm { 829 status = "okay"; 830}; 831 832&mcasp1 { 833 #sound-dai-cells = <0>; 834 pinctrl-names = "default", "sleep"; 835 pinctrl-0 = <&mcasp1_pins>; 836 pinctrl-1 = <&mcasp1_pins_sleep>; 837 838 status = "okay"; 839 840 op-mode = <0>; 841 tdm-slots = <2>; 842 serial-dir = < 843 0 0 1 2 844 >; 845 846 tx-num-evt = <1>; 847 rx-num-evt = <1>; 848}; 849 850&dss { 851 status = "okay"; 852 853 pinctrl-names = "default"; 854 pinctrl-0 = <&dss_pins>; 855 856 port { 857 dpi_out: endpoint@0 { 858 remote-endpoint = <&lcd_in>; 859 data-lines = <24>; 860 }; 861 }; 862}; 863 864&rtc { 865 clocks = <&clk_32k_rtc>, <&clk_32768_ck>; 866 clock-names = "ext-clk", "int-clk"; 867 status = "okay"; 868}; 869 870&wdt { 871 status = "okay"; 872}; 873 874&cpu { 875 cpu0-supply = <&dcdc2>; 876}; 877 878&vpfe0 { 879 status = "okay"; 880 pinctrl-names = "default", "sleep"; 881 pinctrl-0 = <&vpfe0_pins_default>; 882 pinctrl-1 = <&vpfe0_pins_sleep>; 883 884 /* Camera port */ 885 port { 886 vpfe0_ep: endpoint { 887 remote-endpoint = <&ov2659_1>; 888 ti,am437x-vpfe-interface = <0>; 889 bus-width = <8>; 890 hsync-active = <0>; 891 vsync-active = <0>; 892 }; 893 }; 894}; 895 896&wkup_m3_ipc { 897 firmware-name = "am43x-evm-scale-data.bin"; 898}; 899 900&pruss1_mdio { 901 status = "disabled"; 902};