cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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am57xx-sbc-am57x.dts (4057B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Support for CompuLab SBC-AM57x single board computer
      4 *
      5 * Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/
      6 * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
      7 */
      8
      9#include "am57xx-cl-som-am57x.dts"
     10#include "compulab-sb-som.dtsi"
     11
     12/ {
     13	model = "CompuLab CL-SOM-AM57x on SB-SOM-AM57x";
     14	compatible = "compulab,sbc-am57x", "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
     15
     16	aliases {
     17		display0 = &lcd0;
     18		display1 = &hdmi;
     19	};
     20};
     21
     22&dra7_pmx_core {
     23	uart3_pins_default: uart3_pins_default {
     24		pinctrl-single,pins = <
     25			DRA7XX_CORE_IOPAD(0x3648, PIN_INPUT_SLEW | MUX_MODE0)	/* uart3_rxd */
     26			DRA7XX_CORE_IOPAD(0x364c, PIN_INPUT_SLEW | MUX_MODE0)	/* uart3_txd */
     27		>;
     28	};
     29
     30	mmc1_pins_default: mmc1_pins_default {
     31		pinctrl-single,pins = <
     32			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
     33			DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc1_cmd.cmd */
     34			DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
     35			DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
     36			DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
     37			DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
     38			DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14)	/* mmc1_sdcd.gpio6_27 */
     39			DRA7XX_CORE_IOPAD(0x377c, PIN_INPUT | MUX_MODE14)	/* mmc1_sdwp.gpio6_28 */
     40		>;
     41	};
     42
     43	usb1_pins: pinmux_usb1_pins {
     44		pinctrl-single,pins = <
     45			DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
     46		>;
     47	};
     48
     49	i2c5_pins_default: i2c5_pins_default {
     50		pinctrl-single,pins = <
     51			DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT| MUX_MODE10)	/* mcasp1_axr0.i2c5_sda */
     52			DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT| MUX_MODE10)	/* mcasp1_axr1.i2c5_scl */
     53		>;
     54	};
     55
     56	lcd_pins_default: lcd_pins_default {
     57		pinctrl-single,pins = <
     58			DRA7XX_CORE_IOPAD(0x3564, PIN_OUTPUT | MUX_MODE14)      /* vin2a_vsync0.gpio4_0 */
     59		>;
     60	};
     61
     62	hdmi_pins: pinmux_hdmi_pins {
     63		pinctrl-single,pins = <
     64			DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1)	/* i2c2_sda.hdmi1_ddc_scl */
     65			DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1)	/* i2c2_scl.hdmi1_ddc_sda */
     66		>;
     67	};
     68
     69	hdmi_conn_pins: pinmux_hdmi_conn_pins {
     70		pinctrl-single,pins = <
     71			DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT | MUX_MODE14)	/* spi1_cs2.gpio7_12 */
     72		>;
     73	};
     74};
     75
     76&uart3 {
     77	status = "okay";
     78	interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
     79			      <&dra7_pmx_core 0x3f8>;
     80
     81	pinctrl-names = "default";
     82	pinctrl-0 = <&uart3_pins_default>;
     83};
     84
     85&mmc1 {
     86	status = "okay";
     87
     88	pinctrl-names = "default";
     89	pinctrl-0 = <&mmc1_pins_default>;
     90
     91	vmmc-supply = <&ldo1_reg>;
     92	bus-width = <4>;
     93	cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
     94	wp-gpios = <&gpio6 28 GPIO_ACTIVE_HIGH>;
     95};
     96
     97&usb1 {
     98	pinctrl-names = "default";
     99	pinctrl-0 = <&usb1_pins>;
    100};
    101
    102&i2c5 {
    103	status = "okay";
    104	pinctrl-names = "default";
    105	pinctrl-0 = <&i2c5_pins_default>;
    106	clock-frequency = <400000>;
    107
    108	eeprom_base: atmel@54 {
    109		compatible = "atmel,24c08";
    110		reg = <0x54>;
    111		pagesize = <16>;
    112	};
    113
    114	pca9555: pca9555@20 {
    115		compatible = "nxp,pca9555";
    116		reg = <0x20>;
    117		gpio-controller;
    118		#gpio-cells = <2>;
    119	};
    120};
    121
    122&dss {
    123	status = "okay";
    124
    125	vdda_video-supply = <&ldoln_reg>;
    126
    127	port {
    128		dpi_lcd_out: endpoint {
    129			remote-endpoint = <&lcd_in>;
    130			data-lines = <24>;
    131		};
    132	};
    133};
    134
    135&lcd0 {
    136	pinctrl-names = "default";
    137	pinctrl-0 = <&lcd_pins_default>;
    138
    139	enable-gpios = <&pca9555 14 GPIO_ACTIVE_HIGH
    140			&gpio4 0 GPIO_ACTIVE_HIGH>;
    141
    142	port {
    143		lcd_in: endpoint {
    144			remote-endpoint = <&dpi_lcd_out>;
    145			data-lines = <24>;
    146		};
    147	};
    148};
    149
    150&hdmi {
    151	status = "okay";
    152	vdda-supply = <&ldo4_reg>;
    153
    154	pinctrl-names = "default";
    155	pinctrl-0 = <&hdmi_pins>;
    156
    157	port {
    158		hdmi_out: endpoint {
    159			remote-endpoint = <&hdmi_connector_in>;
    160			lanes = <1 0 3 2 5 4 7 6>;
    161		};
    162	};
    163};
    164
    165&hdmi_conn {
    166	pinctrl-names = "default";
    167	pinctrl-0 = <&hdmi_conn_pins>;
    168
    169	hpd-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
    170
    171	port {
    172		hdmi_connector_in: endpoint {
    173			remote-endpoint = <&hdmi_out>;
    174		};
    175	};
    176};