cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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armada-370-netgear-rn102.dts (5139B)


      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Device Tree file for NETGEAR ReadyNAS 102
      4 *
      5 * Copyright (C) 2013, Arnaud EBALARD <arno@natisbad.org>
      6 */
      7
      8/dts-v1/;
      9
     10#include <dt-bindings/input/input.h>
     11#include <dt-bindings/gpio/gpio.h>
     12#include "armada-370.dtsi"
     13
     14/ {
     15	model = "NETGEAR ReadyNAS 102";
     16	compatible = "netgear,readynas-102", "marvell,armada370", "marvell,armada-370-xp";
     17
     18	chosen {
     19		stdout-path = "serial0:115200n8";
     20	};
     21
     22	memory@0 {
     23		device_type = "memory";
     24		reg = <0x00000000 0x20000000>; /* 512 MB */
     25	};
     26
     27	soc {
     28		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
     29			  MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
     30			  MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
     31
     32		internal-regs {
     33
     34			/* RTC is provided by Intersil ISL12057 I2C RTC chip */
     35			rtc@10300 {
     36				status = "disabled";
     37			};
     38
     39			serial@12000 {
     40				status = "okay";
     41			};
     42
     43			/* eSATA interface */
     44			sata@a0000 {
     45				nr-ports = <1>;
     46				status = "okay";
     47			};
     48
     49			ethernet@74000 {
     50				pinctrl-0 = <&ge1_rgmii_pins>;
     51				pinctrl-names = "default";
     52				status = "okay";
     53				phy = <&phy0>;
     54				phy-mode = "rgmii-id";
     55			};
     56
     57			usb@50000 {
     58				status = "okay";
     59			};
     60
     61			i2c@11000 {
     62				clock-frequency = <100000>;
     63
     64				pinctrl-0 = <&i2c0_pins>;
     65				pinctrl-names = "default";
     66
     67				status = "okay";
     68
     69				isl12057: rtc@68 {
     70					compatible = "isil,isl12057";
     71					reg = <0x68>;
     72					wakeup-source;
     73				};
     74
     75				g762: g762@3e {
     76					compatible = "gmt,g762";
     77					reg = <0x3e>;
     78					clocks = <&g762_clk>; /* input clock */
     79					fan_gear_mode = <0>;
     80					fan_startv = <1>;
     81					pwm_polarity = <0>;
     82				};
     83			};
     84		};
     85	};
     86
     87	clocks {
     88	       g762_clk: g762-oscillator {
     89			 compatible = "fixed-clock";
     90			 #clock-cells = <0>;
     91			 clock-frequency = <8192>;
     92	       };
     93	};
     94
     95	gpio-leds {
     96		compatible = "gpio-leds";
     97		pinctrl-0 = <&power_led_pin
     98			     &sata1_led_pin
     99			     &sata2_led_pin
    100			     &backup_led_pin>;
    101		pinctrl-names = "default";
    102
    103		blue-power-led {
    104			label = "rn102:blue:pwr";
    105			gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
    106			default-state = "keep";
    107		};
    108
    109		blue-sata1-led {
    110			label = "rn102:blue:sata1";
    111			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
    112			default-state = "on";
    113		};
    114
    115		blue-sata2-led {
    116			label = "rn102:blue:sata2";
    117			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
    118			default-state = "on";
    119		};
    120
    121		blue-backup-led {
    122			label = "rn102:blue:backup";
    123			gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
    124			default-state = "on";
    125		};
    126	};
    127
    128	gpio-keys {
    129		compatible = "gpio-keys";
    130		pinctrl-0 = <&power_button_pin
    131			     &reset_button_pin
    132			     &backup_button_pin>;
    133		pinctrl-names = "default";
    134
    135		power-button {
    136			label = "Power Button";
    137			linux,code = <KEY_POWER>;
    138			gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
    139		};
    140
    141		reset-button {
    142			label = "Reset Button";
    143			linux,code = <KEY_RESTART>;
    144			gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
    145		};
    146
    147		backup-button {
    148			label = "Backup Button";
    149			linux,code = <KEY_COPY>;
    150			gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
    151		};
    152	};
    153
    154	gpio-poweroff {
    155		compatible = "gpio-poweroff";
    156		pinctrl-0 = <&poweroff>;
    157		pinctrl-names = "default";
    158		gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
    159	};
    160};
    161
    162&pciec {
    163	status = "okay";
    164
    165	/* Connected to Marvell 88SE9170 SATA controller */
    166	pcie@1,0 {
    167		/* Port 0, Lane 0 */
    168		status = "okay";
    169	};
    170
    171	/* Connected to FL1009 USB 3.0 controller */
    172	pcie@2,0 {
    173		/* Port 1, Lane 0 */
    174		status = "okay";
    175	};
    176};
    177
    178&mdio {
    179	pinctrl-0 = <&mdio_pins>;
    180	pinctrl-names = "default";
    181	phy0: ethernet-phy@0 { /* Marvell 88E1318 */
    182		reg = <0>;
    183	};
    184};
    185
    186&pinctrl {
    187	power_led_pin: power-led-pin {
    188		marvell,pins = "mpp57";
    189		marvell,function = "gpio";
    190	};
    191
    192	sata1_led_pin: sata1-led-pin {
    193		marvell,pins = "mpp15";
    194		marvell,function = "gpio";
    195	};
    196
    197	sata2_led_pin: sata2-led-pin {
    198		marvell,pins = "mpp14";
    199		marvell,function = "gpio";
    200	};
    201
    202	backup_led_pin: backup-led-pin {
    203		marvell,pins = "mpp56";
    204		marvell,function = "gpio";
    205	};
    206
    207	backup_button_pin: backup-button-pin {
    208		marvell,pins = "mpp58";
    209		marvell,function = "gpio";
    210	};
    211
    212	power_button_pin: power-button-pin {
    213		marvell,pins = "mpp62";
    214		marvell,function = "gpio";
    215	};
    216
    217	reset_button_pin: reset-button-pin {
    218		marvell,pins = "mpp6";
    219		marvell,function = "gpio";
    220	};
    221
    222	poweroff: poweroff {
    223		marvell,pins = "mpp8";
    224		marvell,function = "gpio";
    225	};
    226};
    227
    228&nand_controller {
    229	status = "okay";
    230
    231	nand@0 {
    232		reg = <0>;
    233		label = "pxa3xx_nand-0";
    234		nand-rb = <0>;
    235		marvell,nand-keep-config;
    236		nand-on-flash-bbt;
    237
    238		/* Use Hardware BCH ECC */
    239		nand-ecc-strength = <4>;
    240		nand-ecc-step-size = <512>;
    241
    242		partitions {
    243			compatible = "fixed-partitions";
    244			#address-cells = <1>;
    245			#size-cells = <1>;
    246
    247			partition@0 {
    248				label = "u-boot";
    249				reg = <0x0000000 0x180000>;  /* 1.5MB */
    250				read-only;
    251			};
    252
    253			partition@180000 {
    254				label = "u-boot-env";
    255				reg = <0x180000 0x20000>;    /* 128KB */
    256				read-only;
    257			};
    258
    259			partition@200000 {
    260				label = "uImage";
    261				reg = <0x0200000 0x600000>;    /* 6MB */
    262			};
    263
    264			partition@800000 {
    265				label = "minirootfs";
    266				reg = <0x0800000 0x400000>;    /* 4MB */
    267			};
    268
    269			/* Last MB is for the BBT, i.e. not writable */
    270			partition@c00000 {
    271				label = "ubifs";
    272				reg = <0x0c00000 0x7400000>; /* 116MB */
    273			};
    274		};
    275	};
    276};