cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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armada-370-synology-ds213j.dts (7167B)


      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Device Tree file for Synology DS213j
      4 *
      5 * Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
      6 *
      7 * Note: this Device Tree assumes that the bootloader has remapped the
      8 * internal registers to 0xf1000000 (instead of the old 0xd0000000).
      9 * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
     10 * bootloaders provided by Marvell. It is used in recent versions of
     11 * DSM software provided by Synology. Nonetheless, some earlier boards
     12 * were delivered with an older version of u-boot that left internal
     13 * registers mapped at 0xd0000000. If you have such a device you will
     14 * not be able to directly boot a kernel based on this Device Tree. In
     15 * that case, the preferred solution is to update your bootloader (e.g.
     16 * by upgrading to latest version of DSM, or building a new one and
     17 * installing it from u-boot prompt) or adjust the Devive Tree
     18 * (s/0xf1000000/0xd0000000/ in 'ranges' below).
     19 */
     20
     21/dts-v1/;
     22
     23#include <dt-bindings/input/input.h>
     24#include <dt-bindings/gpio/gpio.h>
     25#include "armada-370.dtsi"
     26
     27/ {
     28	model = "Synology DS213j";
     29	compatible = "synology,ds213j", "marvell,armada370",
     30		     "marvell,armada-370-xp";
     31
     32	chosen {
     33		stdout-path = "serial0:115200n8";
     34	};
     35
     36	memory@0 {
     37		device_type = "memory";
     38		reg = <0x00000000 0x20000000>; /* 512 MB */
     39	};
     40
     41	soc {
     42		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
     43			  MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
     44			  MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
     45
     46		internal-regs {
     47
     48			/* RTC provided by Seiko S-35390A I2C RTC chip below */
     49			rtc@10300 {
     50				status = "disabled";
     51			};
     52
     53			i2c@11000 {
     54				compatible = "marvell,mv64xxx-i2c";
     55				pinctrl-0 = <&i2c0_pins>;
     56				pinctrl-names = "default";
     57				clock-frequency = <400000>;
     58				status = "okay";
     59
     60				/* Main device RTC chip */
     61				s35390a: s35390a@30 {
     62					 compatible = "sii,s35390a";
     63					 reg = <0x30>;
     64				};
     65			};
     66
     67			/* Connected to a header on device's PCB */
     68			serial@12000 {
     69				status = "okay";
     70			};
     71
     72			/* Connected to a TI MSP430F2111 for power control */
     73			serial@12100 {
     74				status = "okay";
     75			};
     76
     77			poweroff@12100 {
     78				compatible = "synology,power-off";
     79				reg = <0x12100 0x100>;
     80				clocks = <&coreclk 0>;
     81			};
     82
     83			/* rear USB port, near reset button */
     84			usb@50000 {
     85				status = "okay";
     86			};
     87
     88			/* rear USB port, near RJ45 port */
     89			usb@51000 {
     90				status = "okay";
     91			};
     92
     93			ethernet@70000 {
     94			       status = "okay";
     95			       phy = <&phy1>;
     96			       phy-mode = "sgmii";
     97			};
     98
     99			sata@a0000 {
    100				nr-ports = <2>;
    101				status = "okay";
    102			};
    103		};
    104	};
    105
    106	gpio-fan-32-38 {
    107		status = "okay";
    108		compatible = "gpio-fan";
    109		pinctrl-0 = <&fan_ctrl_low_pin &fan_ctrl_mid_pin
    110			     &fan_ctrl_high_pin &fan_alarm_pin>;
    111		pinctrl-names = "default";
    112		gpios = <&gpio1 31 GPIO_ACTIVE_HIGH
    113			 &gpio2  0 GPIO_ACTIVE_HIGH
    114			 &gpio2  1 GPIO_ACTIVE_HIGH>;
    115		alarm-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
    116		gpio-fan,speed-map = <    0 0
    117				       1000 1
    118				       1150 2
    119				       1350 4
    120				       1500 3
    121				       1650 5
    122				       1750 6
    123				       1900 7 >;
    124	};
    125
    126	gpio-leds {
    127		compatible = "gpio-leds";
    128		pinctrl-0 = <&disk1_led_pin
    129			     &disk2_led_pin>;
    130		pinctrl-names = "default";
    131
    132		disk1-led-amber {
    133			label = "synology:amber:disk1";
    134			gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
    135			default-state = "keep";
    136		};
    137
    138		disk2-led-amber {
    139			label = "synology:amber:disk2";
    140			gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
    141			default-state = "keep";
    142		};
    143	};
    144
    145	regulators {
    146		compatible = "simple-bus";
    147		#address-cells = <1>;
    148		#size-cells = <0>;
    149		pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin>;
    150		pinctrl-names = "default";
    151
    152		sata1_regulator: sata1-regulator@1 {
    153			compatible = "regulator-fixed";
    154			reg = <1>;
    155			regulator-name = "SATA1 Power";
    156			regulator-min-microvolt = <5000000>;
    157			regulator-max-microvolt = <5000000>;
    158			startup-delay-us = <2000000>;
    159			enable-active-high;
    160			regulator-always-on;
    161			regulator-boot-on;
    162			gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
    163		};
    164
    165		sata2_regulator: sata2-regulator@2 {
    166			compatible = "regulator-fixed";
    167			reg = <2>;
    168			regulator-name = "SATA2 Power";
    169			regulator-min-microvolt = <5000000>;
    170			regulator-max-microvolt = <5000000>;
    171			startup-delay-us = <4000000>;
    172			enable-active-high;
    173			regulator-always-on;
    174			regulator-boot-on;
    175			gpio = <&gpio1 30 GPIO_ACTIVE_HIGH>;
    176		};
    177	};
    178};
    179
    180&mdio {
    181	phy1: ethernet-phy@1 { /* Marvell 88E1512 */
    182		reg = <1>;
    183	};
    184};
    185
    186&pinctrl {
    187	disk1_led_pin: disk1-led-pin {
    188		marvell,pins = "mpp31";
    189		marvell,function = "gpio";
    190	};
    191
    192	disk2_led_pin: disk2-led-pin {
    193		marvell,pins = "mpp32";
    194		marvell,function = "gpio";
    195	};
    196
    197	sata1_pwr_pin: sata1-pwr-pin {
    198		marvell,pins = "mpp37";
    199		marvell,function = "gpio";
    200	};
    201
    202	sata2_pwr_pin: sata2-pwr-pin {
    203		marvell,pins = "mpp62";
    204		marvell,function = "gpio";
    205	};
    206
    207	sata1_pres_pin: sata1-pres-pin {
    208		marvell,pins = "mpp60";
    209		marvell,function = "gpio";
    210	};
    211
    212	sata2_pres_pin: sata2-pres-pin {
    213		marvell,pins = "mpp48";
    214		marvell,function = "gpio";
    215	};
    216
    217	syno_id_bit0_pin: syno-id-bit0-pin {
    218		marvell,pins = "mpp55";
    219		marvell,function = "gpio";
    220	};
    221
    222	syno_id_bit1_pin: syno-id-bit1-pin {
    223		marvell,pins = "mpp56";
    224		marvell,function = "gpio";
    225	};
    226
    227	syno_id_bit2_pin: syno-id-bit2-pin {
    228		marvell,pins = "mpp57";
    229		marvell,function = "gpio";
    230	};
    231
    232	syno_id_bit3_pin: syno-id-bit3-pin {
    233		marvell,pins = "mpp58";
    234		marvell,function = "gpio";
    235	};
    236
    237	fan_ctrl_low_pin: fan-ctrl-low-pin {
    238		marvell,pins = "mpp65";
    239		marvell,function = "gpio";
    240	};
    241
    242	fan_ctrl_mid_pin: fan-ctrl-mid-pin {
    243		marvell,pins = "mpp64";
    244		marvell,function = "gpio";
    245	};
    246
    247	fan_ctrl_high_pin: fan-ctrl-high-pin {
    248		marvell,pins = "mpp63";
    249		marvell,function = "gpio";
    250	};
    251
    252	fan_alarm_pin: fan-alarm-pin {
    253		marvell,pins = "mpp38";
    254		marvell,function = "gpio";
    255	};
    256};
    257
    258&spi0 {
    259	status = "okay";
    260
    261	flash@0 {
    262		#address-cells = <1>;
    263		#size-cells = <1>;
    264		compatible = "micron,n25q064", "jedec,spi-nor";
    265		reg = <0>; /* Chip select 0 */
    266		spi-max-frequency = <20000000>;
    267
    268		/*
    269		 * Warning!
    270		 *
    271		 * Synology u-boot uses its compiled-in environment
    272		 * and it seems Synology did not care to change u-boot
    273		 * default configuration in order to allow saving a
    274		 * modified environment at a sensible location. So,
    275		 * if you do a 'saveenv' under u-boot, your modified
    276		 * environment will be saved at 1MB after the start
    277		 * of the flash, i.e. in the middle of the uImage.
    278		 * For that reason, it is strongly advised not to
    279		 * change the default environment, unless you know
    280		 * what you are doing.
    281		 */
    282		partition@0 { /* u-boot */
    283			label = "RedBoot";
    284			reg = <0x00000000 0x000c0000>; /* 768KB */
    285		};
    286
    287		partition@c0000 { /* uImage */
    288			label = "zImage";
    289			reg = <0x000c0000 0x002d0000>; /* 2880KB */
    290		};
    291
    292		partition@390000 { /* uInitramfs */
    293			label = "rd.gz";
    294			reg = <0x00390000 0x00440000>; /* 4250KB */
    295		};
    296
    297		partition@7d0000 { /* MAC address and serial number */
    298			label = "vendor";
    299			reg = <0x007d0000 0x00010000>; /* 64KB */
    300		};
    301
    302		partition@7e0000 {
    303			label = "RedBoot config";
    304			reg = <0x007e0000 0x00010000>; /* 64KB */
    305		};
    306
    307		partition@7f0000 {
    308			label = "FIS directory";
    309			reg = <0x007f0000 0x00010000>; /* 64KB */
    310		};
    311	};
    312};