cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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armada-xp-98dx4251.dtsi (1058B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Device Tree Include file for Marvell 98dx4521 family SoC
      4 *
      5 * Copyright (C) 2016 Allied Telesis Labs
      6 *
      7 * Contains definitions specific to the 98dx4521 SoC that are not
      8 * common to all Armada XP SoCs.
      9 */
     10
     11#include "armada-xp-98dx3236.dtsi"
     12
     13/ {
     14	model = "Marvell 98DX4251 SoC";
     15	compatible = "marvell,armadaxp-98dx4251", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
     16
     17	cpus {
     18		cpu@1 {
     19			device_type = "cpu";
     20			compatible = "marvell,sheeva-v7";
     21			reg = <1>;
     22			clocks = <&cpuclk 1>;
     23			clock-latency = <1000000>;
     24		};
     25	};
     26
     27	soc {
     28		internal-regs {
     29			resume@20980 {
     30				compatible = "marvell,98dx3336-resume-ctrl";
     31				reg = <0x20980 0x10>;
     32			};
     33		};
     34	};
     35};
     36
     37&sdio {
     38	status = "okay";
     39};
     40
     41&pinctrl {
     42	compatible = "marvell,98dx4251-pinctrl";
     43
     44	sdio_pins: sdio-pins {
     45		marvell,pins = "mpp5", "mpp6", "mpp7",
     46			       "mpp8", "mpp9", "mpp10";
     47		marvell,function = "sd0";
     48	};
     49};
     50
     51&pp0 {
     52	compatible = "marvell,prestera-98dx4251", "marvell,prestera";
     53	interrupts = <33>, <34>, <35>, <36>;
     54};