cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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armada-xp-linksys-mamba.dts (7126B)


      1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
      2/*
      3 * Device Tree file for the Linksys WRT1900AC (Mamba).
      4 *
      5 * Note: this board is shipped with a new generation boot loader that
      6 * remaps internal registers at 0xf1000000. Therefore, if earlyprintk
      7 * is used, the CONFIG_DEBUG_MVEBU_UART0_ALTERNATE option should be
      8 * used.
      9 *
     10 * Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
     11 *
     12 * Based on armada-xp-axpwifiap.dts:
     13 *
     14 *     Copyright (C) 2013 Marvell
     15 *
     16 *     Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
     17 */
     18
     19/dts-v1/;
     20#include <dt-bindings/gpio/gpio.h>
     21#include <dt-bindings/input/input.h>
     22#include "armada-xp-mv78230.dtsi"
     23
     24/ {
     25	model = "Linksys WRT1900AC";
     26	compatible = "linksys,mamba", "marvell,armadaxp-mv78230",
     27		     "marvell,armadaxp", "marvell,armada-370-xp";
     28
     29	chosen {
     30		bootargs = "console=ttyS0,115200";
     31		stdout-path = &uart0;
     32	};
     33
     34	memory@0 {
     35		device_type = "memory";
     36		reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */
     37	};
     38
     39	soc {
     40		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
     41			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
     42			  MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
     43			  MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000
     44			  MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>;
     45
     46		internal-regs {
     47
     48			rtc@10300 {
     49				/* No crystal connected to the internal RTC */
     50				status = "disabled";
     51			};
     52
     53			/* J10: VCC, NC, RX, NC, TX, GND  */
     54			serial@12000 {
     55				status = "okay";
     56			};
     57
     58			sata@a0000 {
     59				nr-ports = <1>;
     60				status = "okay";
     61			};
     62
     63			ethernet@70000 {
     64				pinctrl-0 = <&ge0_rgmii_pins>;
     65				pinctrl-names = "default";
     66				status = "okay";
     67				phy-mode = "rgmii-id";
     68				buffer-manager = <&bm>;
     69				bm,pool-long = <0>;
     70				bm,pool-short = <1>;
     71				fixed-link {
     72					speed = <1000>;
     73					full-duplex;
     74				};
     75			};
     76
     77			ethernet@74000 {
     78				pinctrl-0 = <&ge1_rgmii_pins>;
     79				pinctrl-names = "default";
     80				status = "okay";
     81				phy-mode = "rgmii-id";
     82				buffer-manager = <&bm>;
     83				bm,pool-long = <2>;
     84				bm,pool-short = <3>;
     85				fixed-link {
     86					speed = <1000>;
     87					full-duplex;
     88				};
     89			};
     90
     91			/* USB part of the eSATA/USB 2.0 port */
     92			usb@50000 {
     93				status = "okay";
     94			};
     95
     96			i2c@11000 {
     97				status = "okay";
     98				clock-frequency = <100000>;
     99
    100				tmp421@4c {
    101					compatible = "ti,tmp421";
    102					reg = <0x4c>;
    103				};
    104
    105				tlc59116@68 {
    106					#address-cells = <1>;
    107					#size-cells = <0>;
    108					#gpio-cells = <2>;
    109					compatible = "ti,tlc59116";
    110					reg = <0x68>;
    111
    112					wan_amber@0 {
    113						label = "mamba:amber:wan";
    114						reg = <0x0>;
    115					};
    116
    117					wan_white@1 {
    118						label = "mamba:white:wan";
    119						reg = <0x1>;
    120					};
    121
    122					wlan_2g@2 {
    123						label = "mamba:white:wlan_2g";
    124						reg = <0x2>;
    125					};
    126
    127					wlan_5g@3 {
    128						label = "mamba:white:wlan_5g";
    129						reg = <0x3>;
    130					};
    131
    132					esata@4 {
    133						label = "mamba:white:esata";
    134						reg = <0x4>;
    135						linux,default-trigger = "disk-activity";
    136					};
    137
    138					usb2@5 {
    139						label = "mamba:white:usb2";
    140						reg = <0x5>;
    141					};
    142
    143					usb3_1@6 {
    144						label = "mamba:white:usb3_1";
    145						reg = <0x6>;
    146					};
    147
    148					usb3_2@7 {
    149						label = "mamba:white:usb3_2";
    150						reg = <0x7>;
    151					};
    152
    153					wps_white@8 {
    154						label = "mamba:white:wps";
    155						reg = <0x8>;
    156					};
    157
    158					wps_amber@9 {
    159						label = "mamba:amber:wps";
    160						reg = <0x9>;
    161					};
    162				};
    163			};
    164
    165			bm@c8000 {
    166				status = "okay";
    167			};
    168		};
    169
    170		bm-bppi {
    171			status = "okay";
    172		};
    173	};
    174
    175	gpio_keys {
    176		compatible = "gpio-keys";
    177		#address-cells = <1>;
    178		#size-cells = <0>;
    179		pinctrl-0 = <&keys_pin>;
    180		pinctrl-names = "default";
    181
    182		wps {
    183			label = "WPS";
    184			linux,code = <KEY_WPS_BUTTON>;
    185			gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
    186		};
    187
    188		reset {
    189			label = "Factory Reset Button";
    190			linux,code = <KEY_RESTART>;
    191			gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
    192		};
    193	};
    194
    195	gpio-leds {
    196		compatible = "gpio-leds";
    197		pinctrl-0 = <&power_led_pin>;
    198		pinctrl-names = "default";
    199
    200		power {
    201			label = "mamba:white:power";
    202			gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
    203			default-state = "on";
    204		};
    205	};
    206
    207	pwm_fan {
    208		/* SUNON HA4010V4-0000-C99 */
    209
    210		compatible = "pwm-fan";
    211		pwms = <&gpio0 24 4000>;
    212	};
    213};
    214
    215&pciec {
    216	status = "okay";
    217
    218	/* Etron EJ168 USB 3.0 controller */
    219	pcie@1,0 {
    220		/* Port 0, Lane 0 */
    221		status = "okay";
    222	};
    223
    224	/* First mini-PCIe port */
    225	pcie@2,0 {
    226		/* Port 0, Lane 1 */
    227		status = "okay";
    228	};
    229
    230	/* Second mini-PCIe port */
    231	pcie@3,0 {
    232		/* Port 0, Lane 3 */
    233		status = "okay";
    234	};
    235};
    236
    237&pinctrl {
    238
    239	keys_pin: keys-pin {
    240		marvell,pins = "mpp32", "mpp33";
    241		marvell,function = "gpio";
    242	};
    243
    244	power_led_pin: power-led-pin {
    245		marvell,pins = "mpp40";
    246		marvell,function = "gpio";
    247	};
    248
    249	gpio_fan_pin: gpio-fan-pin {
    250		marvell,pins = "mpp24";
    251		marvell,function = "gpio";
    252	};
    253};
    254
    255&spi0 {
    256	status = "okay";
    257
    258	flash@0 {
    259		#address-cells = <1>;
    260		#size-cells = <1>;
    261		compatible = "everspin,mr25h256";
    262		reg = <0>; /* Chip select 0 */
    263		spi-max-frequency = <40000000>;
    264	};
    265};
    266
    267&mdio {
    268	status = "okay";
    269
    270	switch@0 {
    271		compatible = "marvell,mv88e6085";
    272		#address-cells = <1>;
    273		#size-cells = <0>;
    274		reg = <0>;
    275
    276		ports {
    277			#address-cells = <1>;
    278			#size-cells = <0>;
    279
    280			port@0 {
    281				reg = <0>;
    282				label = "lan4";
    283			};
    284
    285			port@1 {
    286				reg = <1>;
    287				label = "lan3";
    288			};
    289
    290			port@2 {
    291				reg = <2>;
    292				label = "lan2";
    293			};
    294
    295			port@3 {
    296				reg = <3>;
    297				label = "lan1";
    298			};
    299
    300			port@4 {
    301				reg = <4>;
    302				label = "internet";
    303			};
    304
    305			port@5 {
    306				reg = <5>;
    307				label = "cpu";
    308				ethernet = <&eth0>;
    309				fixed-link {
    310					speed = <1000>;
    311					full-duplex;
    312				};
    313			};
    314		};
    315	};
    316};
    317
    318&nand_controller {
    319	status = "okay";
    320
    321	nand@0 {
    322		reg = <0>;
    323		label = "pxa3xx_nand-0";
    324		nand-rb = <0>;
    325		marvell,nand-keep-config;
    326		nand-on-flash-bbt;
    327		nand-ecc-strength = <4>;
    328		nand-ecc-step-size = <512>;
    329
    330		partitions {
    331			compatible = "fixed-partitions";
    332			#address-cells = <1>;
    333			#size-cells = <1>;
    334
    335			partition@0 {
    336				label = "u-boot";
    337				reg = <0x0000000 0x100000>;  /* 1MB */
    338				read-only;
    339			};
    340
    341			partition@100000 {
    342				label = "u_env";
    343				reg = <0x100000 0x40000>;    /* 256KB */
    344			};
    345
    346			partition@140000 {
    347				label = "s_env";
    348				reg = <0x140000 0x40000>;    /* 256KB */
    349			};
    350
    351			partition@900000 {
    352				label = "devinfo";
    353				reg = <0x900000 0x100000>;   /* 1MB */
    354				read-only;
    355			};
    356
    357			/* kernel1 overlaps with rootfs1 by design */
    358			partition@a00000 {
    359				label = "kernel1";
    360				reg = <0xa00000 0x2800000>;  /* 40MB */
    361			};
    362
    363			partition@d00000 {
    364				label = "rootfs1";
    365				reg = <0xd00000 0x2500000>;  /* 37MB */
    366			};
    367
    368			/* kernel2 overlaps with rootfs2 by design */
    369			partition@3200000 {
    370				label = "kernel2";
    371				reg = <0x3200000 0x2800000>; /* 40MB */
    372			};
    373
    374			partition@3500000 {
    375				label = "rootfs2";
    376				reg = <0x3500000 0x2500000>; /* 37MB */
    377			};
    378
    379			/*
    380			 * 38MB, last MB is for the BBT, not writable
    381			 */
    382			partition@5a00000 {
    383				label = "syscfg";
    384				reg = <0x5a00000 0x2600000>;
    385			};
    386
    387			/*
    388			 * Unused area between "s_env" and "devinfo".
    389			 * Moved here because otherwise the renumbered
    390			 * partitions would break the bootloader
    391			 * supplied bootargs
    392			 */
    393			partition@180000 {
    394				label = "unused_area";
    395				reg = <0x180000 0x780000>;   /* 7.5MB */
    396			};
    397		};
    398	};
    399};