cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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armada-xp-openblocks-ax3-4.dts (3957B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Device Tree file for OpenBlocks AX3-4 board
      4 *
      5 * Copyright (C) 2012 Marvell
      6 *
      7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
      8 */
      9
     10/dts-v1/;
     11#include <dt-bindings/gpio/gpio.h>
     12#include <dt-bindings/input/input.h>
     13#include "armada-xp-mv78260.dtsi"
     14
     15/ {
     16	model = "PlatHome OpenBlocks AX3-4 board";
     17	compatible = "plathome,openblocks-ax3-4", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
     18
     19	chosen {
     20		stdout-path = "serial0:115200n8";
     21	};
     22
     23	memory@0 {
     24		device_type = "memory";
     25		reg = <0 0x00000000 0 0x40000000>; /* 1 GB soldered on */
     26	};
     27
     28	soc {
     29		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
     30			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
     31			  MBUS_ID(0x01, 0x2f) 0 0 0xe8000000 0x8000000
     32			  MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
     33			  MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000
     34			  MBUS_ID(0x0c, 0x04) 0 0 0xd1200000 0x100000>;
     35
     36		devbus-bootcs {
     37			status = "okay";
     38
     39			/* Device Bus parameters are required */
     40
     41			/* Read parameters */
     42			devbus,bus-width    = <16>;
     43			devbus,turn-off-ps  = <60000>;
     44			devbus,badr-skew-ps = <0>;
     45			devbus,acc-first-ps = <124000>;
     46			devbus,acc-next-ps  = <248000>;
     47			devbus,rd-setup-ps  = <0>;
     48			devbus,rd-hold-ps   = <0>;
     49
     50			/* Write parameters */
     51			devbus,sync-enable = <0>;
     52			devbus,wr-high-ps  = <60000>;
     53			devbus,wr-low-ps   = <60000>;
     54			devbus,ale-wr-ps   = <60000>;
     55
     56			/* NOR 128 MiB */
     57			nor@0 {
     58				compatible = "cfi-flash";
     59				reg = <0 0x8000000>;
     60				bank-width = <2>;
     61			};
     62		};
     63
     64		internal-regs {
     65			rtc@10300 {
     66				/* No crystal connected to the internal RTC */
     67				status = "disabled";
     68			};
     69			serial@12000 {
     70				status = "okay";
     71			};
     72			serial@12100 {
     73				status = "okay";
     74			};
     75
     76			leds {
     77				compatible = "gpio-leds";
     78				pinctrl-names = "default";
     79				pinctrl-0 = <&led_pins>;
     80
     81				red_led {
     82					label = "red_led";
     83					gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
     84					default-state = "off";
     85				};
     86
     87				yellow_led {
     88					label = "yellow_led";
     89					gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
     90					default-state = "off";
     91				};
     92
     93				green_led {
     94					label = "green_led";
     95					gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
     96					default-state = "keep";
     97				};
     98			};
     99
    100			gpio_keys {
    101				compatible = "gpio-keys";
    102				#address-cells = <1>;
    103				#size-cells = <0>;
    104
    105				init {
    106					label = "Init Button";
    107					linux,code = <KEY_POWER>;
    108					gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
    109				};
    110			};
    111
    112			ethernet@70000 {
    113				status = "okay";
    114				phy = <&phy0>;
    115				phy-mode = "sgmii";
    116				buffer-manager = <&bm>;
    117				bm,pool-long = <0>;
    118			};
    119			ethernet@74000 {
    120				status = "okay";
    121				phy = <&phy1>;
    122				phy-mode = "sgmii";
    123				buffer-manager = <&bm>;
    124				bm,pool-long = <1>;
    125			};
    126			ethernet@30000 {
    127				status = "okay";
    128				phy = <&phy2>;
    129				phy-mode = "sgmii";
    130				buffer-manager = <&bm>;
    131				bm,pool-long = <2>;
    132			};
    133			ethernet@34000 {
    134				status = "okay";
    135				phy = <&phy3>;
    136				phy-mode = "sgmii";
    137				buffer-manager = <&bm>;
    138				bm,pool-long = <3>;
    139			};
    140			i2c@11000 {
    141				status = "okay";
    142				clock-frequency = <400000>;
    143			};
    144			i2c@11100 {
    145				status = "okay";
    146				clock-frequency = <400000>;
    147
    148				s35390a: s35390a@30 {
    149					compatible = "s35390a";
    150					reg = <0x30>;
    151				};
    152			};
    153			sata@a0000 {
    154				nr-ports = <2>;
    155				status = "okay";
    156			};
    157
    158			/* Front side USB 0 */
    159			usb@50000 {
    160				status = "okay";
    161			};
    162
    163			/* Front side USB 1 */
    164			usb@51000 {
    165				status = "okay";
    166			};
    167
    168			bm@c0000 {
    169				status = "okay";
    170			};
    171		};
    172
    173		bm-bppi {
    174			status = "okay";
    175		};
    176	};
    177};
    178
    179&pciec {
    180	status = "okay";
    181	/* Internal mini-PCIe connector */
    182	pcie@1,0 {
    183		/* Port 0, Lane 0 */
    184		status = "okay";
    185	};
    186};
    187
    188&mdio {
    189	phy0: ethernet-phy@0 {
    190		reg = <0>;
    191	};
    192
    193	phy1: ethernet-phy@1 {
    194		reg = <1>;
    195	};
    196
    197	phy2: ethernet-phy@2 {
    198		reg = <2>;
    199	};
    200
    201	phy3: ethernet-phy@3 {
    202		reg = <3>;
    203	};
    204};
    205
    206&pinctrl {
    207	led_pins: led-pins-0 {
    208		marvell,pins = "mpp49", "mpp51", "mpp53";
    209		marvell,function = "gpio";
    210	};
    211};