cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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aspeed-bmc-arm-stardragon4800-rep2.dts (3275B)

      1// SPDX-License-Identifier: GPL-2.0+
      2/dts-v1/;
      3
      4#include "aspeed-g5.dtsi"
      5#include <dt-bindings/gpio/aspeed-gpio.h>
      6
      7/ {
      8	model = "HXT StarDragon 4800 REP2 AST2520";
      9	compatible = "hxt,stardragon4800-rep2-bmc", "aspeed,ast2500";
     10
     11	chosen {
     12		stdout-path = &uart5;
     13		bootargs = "console=ttyS4,115200 earlycon";
     14	};
     15
     16	memory@80000000 {
     17		reg = <0x80000000 0x40000000>;
     18	};
     19
     20	iio-hwmon {
     21		compatible = "iio-hwmon";
     22		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
     23						<&adc 4>, <&adc 5>, <&adc 6>, <&adc 8>;
     24	};
     25
     26	iio-hwmon-battery {
     27		compatible = "iio-hwmon";
     28		io-channels = <&adc 7>;
     29	};
     30
     31	leds {
     32		compatible = "gpio-leds";
     33
     34		system_fault1 {
     35			label = "System_fault1";
     36			gpios = <&gpio ASPEED_GPIO(I, 3) GPIO_ACTIVE_LOW>;
     37		};
     38
     39		system_fault2 {
     40			label = "System_fault2";
     41			gpios = <&gpio ASPEED_GPIO(I, 2) GPIO_ACTIVE_LOW>;
     42		};
     43	};
     44};
     45
     46&fmc {
     47	status = "okay";
     48	flash@0 {
     49		status = "okay";
     50		m25p,fast-read;
     51		label = "bmc";
     52#include "openbmc-flash-layout.dtsi"
     53	};
     54};
     55
     56&spi1 {
     57	status = "okay";
     58	pinctrl-names = "default";
     59	pinctrl-0 = <&pinctrl_spi1_default>;
     60	flash@0 {
     61		status = "okay";
     62	};
     63};
     64
     65&spi2 {
     66	pinctrl-names = "default";
     67	pinctrl-0 = <&pinctrl_spi2ck_default
     68			&pinctrl_spi2miso_default
     69			&pinctrl_spi2mosi_default
     70			&pinctrl_spi2cs0_default>;
     71};
     72
     73&uart3 {
     74	status = "okay";
     75
     76	pinctrl-names = "default";
     77	pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
     78	current-speed = <115200>;
     79};
     80
     81&uart5 {
     82	status = "okay";
     83};
     84
     85&mac0 {
     86	status = "okay";
     87	pinctrl-names = "default";
     88	pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
     89};
     90
     91&mac1 {
     92	status = "okay";
     93	pinctrl-names = "default";
     94	pinctrl-0 = <&pinctrl_rmii2_default>;
     95	clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>,
     96		 <&syscon ASPEED_CLK_MAC2RCLK>;
     97	clock-names = "MACCLK", "RCLK";
     98	use-ncsi;
     99};
    100
    101&i2c0 {
    102	status = "okay";
    103};
    104
    105&i2c1 {
    106	status = "okay";
    107
    108	tmp421@1e {
    109		compatible = "ti,tmp421";
    110		reg = <0x1e>;
    111	};
    112	tmp421@2a {
    113		compatible = "ti,tmp421";
    114		reg = <0x2a>;
    115	};
    116	tmp421@1c {
    117		compatible = "ti,tmp421";
    118		reg = <0x1c>;
    119	};
    120};
    121
    122&i2c2 {
    123	status = "okay";
    124};
    125
    126&i2c3 {
    127	status = "okay";
    128};
    129
    130&i2c4 {
    131	status = "okay";
    132};
    133
    134&i2c5 {
    135	status = "okay";
    136};
    137
    138&i2c6 {
    139	status = "okay";
    140
    141	tmp421@1f {
    142		compatible = "ti,tmp421";
    143		reg = <0x1f>;
    144	};
    145	nvt210@4c {
    146		compatible = "nvt210";
    147		reg = <0x4c>;
    148	};
    149	eeprom@50 {
    150		compatible = "atmel,24c128";
    151		reg = <0x50>;
    152		pagesize = <128>;
    153	};
    154};
    155
    156&i2c7 {
    157	status = "okay";
    158};
    159
    160&i2c8 {
    161	status = "okay";
    162
    163	pca9641@70 {
    164		compatible = "nxp,pca9641";
    165		reg = <0x70>;
    166		i2c-arb {
    167			#address-cells = <1>;
    168			#size-cells = <0>;
    169			eeprom@50 {
    170				compatible = "atmel,24c02";
    171				reg = <0x50>;
    172			};
    173			dps650ab@58 {
    174				compatible = "dps650ab";
    175				reg = <0x58>;
    176			};
    177		};
    178	};
    179
    180	dps650ab@58 {
    181		compatible = "delta,dps650ab";
    182		reg = <0x58>;
    183	};
    184
    185	dps650ab@59 {
    186		compatible = "delta,dps650ab";
    187		reg = <0x59>;
    188	};
    189};
    190
    191&i2c9 {
    192	status = "okay";
    193};
    194
    195&vuart {
    196	status = "okay";
    197};
    198
    199&gfx {
    200	status = "okay";
    201};
    202
    203&pinctrl {
    204	aspeed,external-nodes = <&gfx &lhc>;
    205};
    206
    207&gpio {
    208	pin_gpio_c7 {
    209		gpio-hog;
    210		gpios = <ASPEED_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
    211		output-low;
    212		line-name = "BIOS_SPI_MUX_S";
    213	};
    214	pin_gpio_d1 {
    215		gpio-hog;
    216		gpios = <ASPEED_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
    217		output-high;
    218		line-name = "PHY2_RESET_N";
    219	};
    220};