cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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aspeed-bmc-lenovo-hr855xg2.dts (10816B)


      1// SPDX-License-Identifier: GPL-2.0+
      2/*
      3 * Device Tree file for Lenovo Hr855xg2 platform
      4 *
      5 * Copyright (C) 2019-present Lenovo
      6 */
      7
      8/dts-v1/;
      9
     10#include "aspeed-g5.dtsi"
     11#include <dt-bindings/gpio/aspeed-gpio.h>
     12
     13/ {
     14	model = "HR855XG2 BMC";
     15	compatible = "lenovo,hr855xg2-bmc", "aspeed,ast2500";
     16
     17	aliases {
     18		i2c14 = &i2c_riser1;
     19		i2c15 = &i2c_riser2;
     20		i2c16 = &i2c_riser3;
     21		i2c17 = &i2c_M2;
     22		i2c18 = &channel_0;
     23		i2c19 = &channel_1;
     24		i2c20 = &channel_2;
     25		i2c21 = &channel_3;
     26	};
     27
     28	chosen {
     29		stdout-path = &uart5;
     30		bootargs = "console=tty0 console=ttyS4,115200 earlycon";
     31	};
     32
     33	memory@80000000 {
     34		device_type = "memory";
     35		reg = <0x80000000 0x20000000>;
     36	};
     37
     38	reserved-memory {
     39		#address-cells = <1>;
     40		#size-cells = <1>;
     41		ranges;
     42
     43		flash_memory: region@98000000 {
     44			no-map;
     45			reg = <0x98000000 0x00100000>; /* 1M */
     46		};
     47
     48		gfx_memory: framebuffer {
     49			size = <0x01000000>;
     50			alignment = <0x01000000>;
     51			compatible = "shared-dma-pool";
     52			reusable;
     53		};
     54	};
     55
     56	leds {
     57		compatible = "gpio-leds";
     58
     59		heartbeat {
     60			gpios = <&gpio ASPEED_GPIO(C, 7) GPIO_ACTIVE_LOW>;
     61		};
     62
     63		fault {
     64			gpios = <&gpio ASPEED_GPIO(G, 3) GPIO_ACTIVE_LOW>;
     65		};
     66	};
     67
     68	iio-hwmon {
     69		compatible = "iio-hwmon";
     70		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
     71		<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
     72		<&adc 8>, <&adc 9>, <&adc 10>,<&adc 11>,
     73		<&adc 12>,<&adc 13>,<&adc 14>;
     74	};
     75
     76	iio-hwmon-battery {
     77		compatible = "iio-hwmon";
     78		io-channels = <&adc 15>;
     79	};
     80
     81};
     82
     83&fmc {
     84	status = "okay";
     85	flash@0 {
     86		status = "okay";
     87		m25p,fast-read;
     88		label = "bmc";
     89		spi-max-frequency = <50000000>;
     90#include "openbmc-flash-layout.dtsi"
     91	};
     92};
     93
     94&lpc_ctrl {
     95	status = "okay";
     96	memory-region = <&flash_memory>;
     97	flash = <&spi1>;
     98};
     99
    100&lpc_snoop {
    101	status = "okay";
    102	snoop-ports = <0x80>;
    103};
    104
    105&uart1 {
    106	status = "okay";
    107	pinctrl-names = "default";
    108	pinctrl-0 = <&pinctrl_txd1_default
    109			&pinctrl_rxd1_default>;
    110};
    111
    112&uart2 {
    113	/* Rear RS-232 connector */
    114	status = "okay";
    115	pinctrl-names = "default";
    116	pinctrl-0 = <&pinctrl_txd2_default
    117			&pinctrl_rxd2_default
    118			&pinctrl_nrts2_default
    119			&pinctrl_ndtr2_default
    120			&pinctrl_ndsr2_default
    121			&pinctrl_ncts2_default
    122			&pinctrl_ndcd2_default
    123			&pinctrl_nri2_default>;
    124};
    125
    126&uart3 {
    127	status = "okay";
    128};
    129
    130&uart5 {
    131	status = "okay";
    132};
    133
    134&ibt {
    135	status = "okay";
    136};
    137
    138&mac0 {
    139	status = "okay";
    140	pinctrl-names = "default";
    141	pinctrl-0 = <&pinctrl_rmii1_default>;
    142	clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
    143		 <&syscon ASPEED_CLK_MAC1RCLK>;
    144	clock-names = "MACCLK", "RCLK";
    145	use-ncsi;
    146};
    147
    148&mac1 {
    149	status = "okay";
    150	pinctrl-names = "default";
    151	pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
    152};
    153
    154&adc{
    155	status = "okay";
    156	pinctrl-names = "default";
    157	pinctrl-0 = <&pinctrl_adc0_default
    158			&pinctrl_adc1_default
    159			&pinctrl_adc2_default
    160			&pinctrl_adc3_default
    161			&pinctrl_adc4_default
    162			&pinctrl_adc5_default
    163			&pinctrl_adc6_default
    164			&pinctrl_adc7_default
    165			&pinctrl_adc8_default
    166			&pinctrl_adc9_default
    167			&pinctrl_adc10_default
    168			&pinctrl_adc11_default
    169			&pinctrl_adc12_default
    170			&pinctrl_adc13_default
    171			&pinctrl_adc14_default
    172			&pinctrl_adc15_default>;
    173};
    174
    175&i2c0 {
    176	status = "okay";
    177
    178	i2c-switch@70 {
    179		compatible = "nxp,pca9545";
    180		reg = <0x70>;
    181		#address-cells = <1>;
    182		#size-cells = <0>;
    183
    184		i2c_riser1: i2c@0 {
    185			#address-cells = <1>;
    186			#size-cells = <0>;
    187			reg = <0>;
    188		};
    189
    190		i2c_riser2: i2c@1 {
    191			#address-cells = <1>;
    192			#size-cells = <0>;
    193			reg = <1>;
    194		};
    195
    196		i2c_riser3: i2c@2 {
    197			#address-cells = <1>;
    198			#size-cells = <0>;
    199			reg = <2>;
    200		};
    201
    202		i2c_M2: i2c@3 {
    203			#address-cells = <1>;
    204			#size-cells = <0>;
    205			reg = <3>;
    206		};
    207	};
    208};
    209
    210&i2c1 {
    211	status = "okay";
    212	bus-frequency = <90000>;
    213	HotSwap@10 {
    214		compatible = "adm1272";
    215		reg = <0x10>;
    216	};
    217
    218	VR@45 {
    219		compatible = "pmbus";
    220		reg = <0x45>;
    221	};
    222};
    223
    224&i2c2 {
    225	status = "okay";
    226};
    227
    228&i2c3 {
    229	status = "okay";
    230	i2c-switch@70 {
    231		compatible = "nxp,pca9546";
    232		reg = <0x70>;
    233		#address-cells = <1>;
    234		#size-cells = <0>;
    235
    236		channel_0: i2c@0 {
    237			#address-cells = <1>;
    238			#size-cells = <0>;
    239			reg = <0>;
    240		};
    241
    242		channel_1: i2c@1 {
    243			#address-cells = <1>;
    244			#size-cells = <0>;
    245			reg = <1>;
    246		};
    247
    248		channel_2: i2c@2 {
    249			#address-cells = <1>;
    250			#size-cells = <0>;
    251			reg = <2>;
    252		};
    253
    254		channel_3: i2c@3 {
    255			#address-cells = <1>;
    256			#size-cells = <0>;
    257			reg = <3>;
    258		};
    259	};
    260};
    261
    262&i2c4 {
    263	status = "okay";
    264};
    265
    266&i2c5 {
    267	status = "okay";
    268};
    269
    270&i2c6 {
    271	status = "okay";
    272	/* temp1 */
    273	tmp75@49 {
    274		compatible = "national,lm75";
    275		reg = <0x49>;
    276	};
    277
    278	/* temp2 */
    279	tmp75@4d {
    280		compatible = "national,lm75";
    281		reg = <0x4d>;
    282	};
    283
    284	eeprom@54 {
    285		compatible = "atmel,24c256";
    286		reg = <0x54>;
    287		pagesize = <16>;
    288	};
    289};
    290
    291&i2c7 {
    292	status = "okay";
    293};
    294
    295&i2c8 {
    296	status = "okay";
    297};
    298
    299&i2c9 {
    300	status = "okay";
    301};
    302
    303&i2c10 {
    304	status = "okay";
    305};
    306
    307&i2c11 {
    308	status = "okay";
    309};
    310
    311&i2c13 {
    312	status = "okay";
    313};
    314
    315&ehci1 {
    316	status = "okay";
    317};
    318
    319&uhci {
    320	status = "okay";
    321};
    322
    323&gfx {
    324	status = "okay";
    325	memory-region = <&gfx_memory>;
    326};
    327
    328&pwm_tacho {
    329	status = "okay";
    330	pinctrl-names = "default";
    331	pinctrl-0 = <&pinctrl_pwm0_default
    332	&pinctrl_pwm1_default
    333	&pinctrl_pwm2_default
    334	&pinctrl_pwm3_default
    335	&pinctrl_pwm4_default
    336	&pinctrl_pwm5_default
    337	&pinctrl_pwm6_default
    338	&pinctrl_pwm7_default>;
    339
    340	fan@0 {
    341		reg = <0x00>;
    342		aspeed,fan-tach-ch = /bits/ 8 <0x00>;
    343	};
    344
    345	fan@1 {
    346		reg = <0x00>;
    347		aspeed,fan-tach-ch = /bits/ 8 <0x01>;
    348	};
    349
    350	fan@2 {
    351		reg = <0x01>;
    352		aspeed,fan-tach-ch = /bits/ 8 <0x02>;
    353	};
    354
    355	fan@3 {
    356		reg = <0x01>;
    357		aspeed,fan-tach-ch = /bits/ 8 <0x03>;
    358	};
    359
    360	fan@4 {
    361		reg = <0x02>;
    362		aspeed,fan-tach-ch = /bits/ 8 <0x04>;
    363	};
    364
    365	fan@5 {
    366		reg = <0x02>;
    367		aspeed,fan-tach-ch = /bits/ 8 <0x05>;
    368	};
    369
    370	fan@6 {
    371		reg = <0x03>;
    372		aspeed,fan-tach-ch = /bits/ 8 <0x06>;
    373	};
    374
    375	fan@7 {
    376		reg = <0x03>;
    377		aspeed,fan-tach-ch = /bits/ 8 <0x07>;
    378	};
    379
    380	fan@8 {
    381		reg = <0x04>;
    382		aspeed,fan-tach-ch = /bits/ 8 <0x08>;
    383	};
    384
    385	fan@9 {
    386		reg = <0x04>;
    387		aspeed,fan-tach-ch = /bits/ 8 <0x09>;
    388	};
    389
    390	fan@10 {
    391		reg = <0x05>;
    392		aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
    393	};
    394
    395	fan@11 {
    396		reg = <0x05>;
    397		aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
    398	};
    399
    400	fan@12 {
    401		reg = <0x06>;
    402		aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
    403	};
    404
    405	fan@13 {
    406		reg = <0x06>;
    407		aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
    408	};
    409
    410	fan@14 {
    411		reg = <0x07>;
    412		aspeed,fan-tach-ch = /bits/ 8 <0x0e>;
    413	};
    414
    415	fan@15 {
    416		reg = <0x07>;
    417		aspeed,fan-tach-ch = /bits/ 8 <0x0f>;
    418	};
    419
    420	fan@16 {
    421		reg = <0x07>;
    422		aspeed,fan-tach-ch = /bits/ 8 <0x0f>;
    423	};
    424};
    425
    426&gpio {
    427
    428	pin_gpio_a1 {
    429		gpio-hog;
    430		gpios = <ASPEED_GPIO(A, 1) GPIO_ACTIVE_LOW>;
    431		output-high;
    432		line-name = "BMC_EMMC_RST_N";
    433	};
    434
    435	pin_gpio_a3 {
    436		gpio-hog;
    437		gpios = <ASPEED_GPIO(A, 3) GPIO_ACTIVE_LOW>;
    438		output-high;
    439		line-name = "PCH_PWROK_BMC_FPGA";
    440	};
    441
    442	pin_gpio_b5 {
    443		gpio-hog;
    444		gpios = <ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
    445		output-high;
    446		line-name = "IRQ_BMC_PCH_SMI_LPC_N";
    447	};
    448
    449	pin_gpio_b7 {
    450		gpio-hog;
    451		gpios = <ASPEED_GPIO(B, 7) GPIO_ACTIVE_LOW>;
    452		output-low;
    453		line-name = "CPU_SM_WP";
    454	};
    455
    456	pin_gpio_e0 {
    457		gpio-hog;
    458		gpios = <ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>;
    459		input;
    460		line-name = "PDB_PSU_SEL";
    461	};
    462
    463	pin_gpio_e2 {
    464		gpio-hog;
    465		gpios = <ASPEED_GPIO(E, 2) GPIO_ACTIVE_HIGH>;
    466		output-high;
    467		line-name = "LOCATOR_LED_N";
    468	};
    469
    470	pin_gpio_e5 {
    471		gpio-hog;
    472		gpios = <ASPEED_GPIO(E, 5) GPIO_ACTIVE_HIGH>;
    473		output-high;
    474		line-name = "FM_BMC_DBP_PRESENT_R1_N";
    475	};
    476
    477	pin_gpio_e6 {
    478		gpio-hog;
    479		gpios = <ASPEED_GPIO(E, 6) GPIO_ACTIVE_HIGH>;
    480		output-high;
    481		line-name = "BMC_ME_SECURITY_OVERRIDE_N";
    482	};
    483
    484	pin_gpio_f0 {
    485		gpio-hog;
    486		gpios = <ASPEED_GPIO(F, 0) GPIO_ACTIVE_HIGH>;
    487		output-high;
    488		line-name = "IRQ_BMC_PCH_NMI_R";
    489	};
    490
    491	pin_gpio_f1 {
    492		gpio-hog;
    493		gpios = <ASPEED_GPIO(F, 1) GPIO_ACTIVE_HIGH>;
    494		input;
    495		line-name = "CPU2_PROCDIS_BMC_N";
    496	};
    497
    498	pin_gpio_f2 {
    499		gpio-hog;
    500		gpios = <ASPEED_GPIO(F, 2) GPIO_ACTIVE_HIGH>;
    501		output-high;
    502		line-name = "RM_THROTTLE_EN_N";
    503	};
    504
    505	pin_gpio_f3 {
    506		gpio-hog;
    507		gpios = <ASPEED_GPIO(F, 3) GPIO_ACTIVE_HIGH>;
    508		output-low;
    509		line-name = "FM_PMBUS_ALERT_B_EN";
    510	};
    511
    512	pin_gpio_f4 {
    513		gpio-hog;
    514		gpios = <ASPEED_GPIO(F, 4) GPIO_ACTIVE_HIGH>;
    515		output-high;
    516		line-name = "BMC_FORCE_NM_THROTTLE_N";
    517	};
    518
    519	pin_gpio_f6 {
    520		gpio-hog;
    521		gpios = <ASPEED_GPIO(F, 6) GPIO_ACTIVE_HIGH>;
    522		output-high;
    523		line-name = "FM_BMC_CPU_PWR_DEBUG_N";
    524	};
    525
    526	pin_gpio_g7 {
    527		gpio-hog;
    528		gpios = <ASPEED_GPIO(G, 7) GPIO_ACTIVE_HIGH>;
    529		output-high;
    530		line-name = "BMC_PCIE_I2C_MUX_RST_N";
    531	};
    532
    533	pin_gpio_h6 {
    534		gpio-hog;
    535		gpios = <ASPEED_GPIO(H, 6) GPIO_ACTIVE_HIGH>;
    536		output-high;
    537		line-name = "FM_BMC_DBP_PRESENT_R2_N";
    538	};
    539
    540	pin_gpio_i3 {
    541		gpio-hog;
    542		gpios = <ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
    543		output-high;
    544		line-name = "SPI_BMC_BIOS_WP_N";
    545	};
    546
    547	pin_gpio_j1 {
    548		gpio-hog;
    549		gpios = <ASPEED_GPIO(J, 1) GPIO_ACTIVE_HIGH>;
    550		output-high;
    551		line-name = "BMC_USB_SEL";
    552	};
    553
    554	pin_gpio_j2 {
    555		gpio-hog;
    556		gpios = <ASPEED_GPIO(J, 2) GPIO_ACTIVE_HIGH>;
    557		output-high;
    558		line-name = "PDB_SMB_RST_N";
    559	};
    560
    561	pin_gpio_j3 {
    562		gpio-hog;
    563		gpios = <ASPEED_GPIO(J, 3) GPIO_ACTIVE_HIGH>;
    564		output-high;
    565		line-name = "SPI_BMC_BIOS_HOLD_N";
    566	};
    567
    568	pin_gpio_l0 {
    569		gpio-hog;
    570		gpios = <ASPEED_GPIO(L, 0) GPIO_ACTIVE_HIGH>;
    571		output-high;
    572		line-name = "PDB_FAN_TACH_SEL";
    573	};
    574
    575	pin_gpio_l1 {
    576		gpio-hog;
    577		gpios = <ASPEED_GPIO(L, 1) GPIO_ACTIVE_HIGH>;
    578		output-high;
    579		line-name = "SYS_RESET_BMC_FPGA_N";
    580	};
    581
    582	pin_gpio_l4 {
    583		gpio-hog;
    584		gpios = <ASPEED_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
    585		output-high;
    586		line-name = "FM_EFUSE_FAN_G1_EN";
    587	};
    588
    589	pin_gpio_l5 {
    590		gpio-hog;
    591		gpios = <ASPEED_GPIO(L, 5) GPIO_ACTIVE_HIGH>;
    592		output-high;
    593		line-name = "FM_EFUSE_FAN_G2_EN";
    594	};
    595
    596	pin_gpio_r6 {
    597		gpio-hog;
    598		gpios = <ASPEED_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
    599		input;
    600		line-name = "CPU3_PROCDIS_BMC_N";
    601	};
    602
    603	pin_gpio_r7 {
    604		gpio-hog;
    605		gpios = <ASPEED_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
    606		input;
    607		line-name = "CPU4_PROCDIS_BMC_N";
    608	};
    609
    610	pin_gpio_s1 {
    611		gpio-hog;
    612		gpios = <ASPEED_GPIO(S, 1) GPIO_ACTIVE_HIGH>;
    613		output-low;
    614		line-name = "DBP_SYSPWROK_BMC";
    615	};
    616
    617	pin_gpio_s2 {
    618		gpio-hog;
    619		gpios = <ASPEED_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
    620		output-high;
    621		line-name = "PCH_RST_RSMRST_N";
    622	};
    623
    624	pin_gpio_s6 {
    625		gpio-hog;
    626		gpios = <ASPEED_GPIO(S, 6) GPIO_ACTIVE_HIGH>;
    627		output-high;
    628		line-name = "BMC_HW_STRAP_5";
    629	};
    630
    631	pin_gpio_z3 {
    632		gpio-hog;
    633		gpios = <ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
    634		output-high;
    635		line-name = "FM_BMC_PCH_SCI_LPC_N";
    636	};
    637
    638	pin_gpio_aa0 {
    639		gpio-hog;
    640		gpios = <ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
    641		output-low;
    642		line-name = "FW_PSU_ALERT_EN_N";
    643	};
    644
    645	pin_gpio_aa4 {
    646		gpio-hog;
    647		gpios = <ASPEED_GPIO(AA, 4) GPIO_ACTIVE_HIGH>;
    648		output-high;
    649		line-name = "DBP_CPU_PREQ_N";
    650	};
    651
    652	pin_gpio_ab3 {
    653		gpio-hog;
    654		gpios = <ASPEED_GPIO(AB, 3) GPIO_ACTIVE_HIGH>;
    655		output-low;
    656		line-name = "BMC_WDTRST";
    657	};
    658
    659	pin_gpio_ac6 {
    660		gpio-hog;
    661		gpios = <ASPEED_GPIO(AC, 6) GPIO_ACTIVE_HIGH>;
    662		output-high;
    663		line-name = "ESPI_BMC_ALERT_N";
    664	};
    665
    666};