cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

aspeed-bmc-microsoft-olympus.dts (2976B)

      1//SPDX-License-Identifier: GPL-2.0+
      2
      3/dts-v1/;
      4
      5#include "aspeed-g4.dtsi"
      6#include <dt-bindings/gpio/aspeed-gpio.h>
      7
      8/ {
      9	model = "Olympus BMC";
     10	compatible = "microsoft,olympus-bmc", "aspeed,ast2400";
     11
     12	chosen {
     13		stdout-path = &uart5;
     14		bootargs = "console=ttyS4,115200 earlycon";
     15	};
     16
     17	memory@40000000 {
     18		reg = <0x40000000 0x20000000>;
     19	};
     20
     21	reserved-memory {
     22		#address-cells = <1>;
     23		#size-cells = <1>;
     24		ranges;
     25
     26		vga_memory: framebuffer@5f000000 {
     27			no-map;
     28			reg = <0x5f000000 0x01000000>; /* 16M */
     29		};
     30	};
     31
     32	leds {
     33		compatible = "gpio-leds";
     34
     35		bmc_heartbeat {
     36			gpios = <&gpio ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>;
     37		};
     38
     39		power_green {
     40			gpios = <&gpio ASPEED_GPIO(U, 2) GPIO_ACTIVE_HIGH>;
     41		};
     42
     43		power_amber {
     44			gpios = <&gpio ASPEED_GPIO(U, 3) GPIO_ACTIVE_HIGH>;
     45		};
     46
     47		identify {
     48			gpios = <&gpio ASPEED_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
     49		};
     50
     51		fault {
     52			gpios = <&gpio ASPEED_GPIO(A, 1) GPIO_ACTIVE_LOW>;
     53		};
     54	};
     55
     56
     57	iio-hwmon {
     58		compatible = "iio-hwmon";
     59		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
     60		<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
     61	};
     62};
     63
     64&adc {
     65	status = "okay";
     66	pinctrl-names = "default";
     67	pinctrl-0 =    <&pinctrl_adc0_default
     68			&pinctrl_adc1_default
     69			&pinctrl_adc2_default
     70			&pinctrl_adc3_default
     71			&pinctrl_adc4_default
     72			&pinctrl_adc5_default
     73			&pinctrl_adc6_default
     74			&pinctrl_adc7_default>;
     75};
     76
     77&fmc {
     78	status = "okay";
     79
     80	flash@0 {
     81		status = "okay";
     82		m25p,fast-read;
     83		label = "bmc";
     84#include "openbmc-flash-layout.dtsi"
     85	};
     86};
     87
     88&spi {
     89	status = "okay";
     90	pinctrl-names = "default";
     91	pinctrl-0 = <&pinctrl_spi1_default>;
     92
     93	flash@0 {
     94		status = "okay";
     95		m25p,fast-read;
     96		label = "pnor";
     97	};
     98};
     99
    100&uart5 {
    101	status = "okay";
    102};
    103
    104&mac0 {
    105	status = "okay";
    106
    107	pinctrl-names = "default";
    108	pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
    109};
    110
    111&i2c0 {
    112	status = "okay";
    113};
    114
    115&i2c1 {
    116	status = "okay";
    117
    118	tmp421@4c {
    119		compatible = "ti,tmp421";
    120		reg = <0x4c>;
    121	};
    122};
    123
    124&i2c2 {
    125	status = "okay";
    126};
    127
    128&i2c3 {
    129	status = "okay";
    130};
    131
    132&i2c4 {
    133	status = "okay";
    134	clock-frequency = <100000>;
    135};
    136
    137&i2c5 {
    138	status = "okay";
    139};
    140
    141&i2c6 {
    142	status = "okay";
    143
    144	tmp421@4c {
    145		compatible = "ti,tmp421";
    146		reg = <0x4c>;
    147	};
    148};
    149
    150&i2c7 {
    151	status = "okay";
    152};
    153
    154&vuart {
    155	status = "okay";
    156};
    157
    158&wdt2 {
    159	status = "okay";
    160};
    161
    162&lpc_ctrl {
    163	status = "okay";
    164};
    165
    166&pwm_tacho {
    167	status = "okay";
    168	pinctrl-names = "default";
    169	pinctrl-0 =    <&pinctrl_pwm0_default
    170			&pinctrl_pwm1_default
    171			&pinctrl_pwm2_default
    172			&pinctrl_pwm3_default
    173			&pinctrl_pwm4_default
    174			&pinctrl_pwm5_default
    175			&pinctrl_pwm6_default>;
    176
    177	fan@0 {
    178		reg = <0x00>;
    179		aspeed,fan-tach-ch = /bits/ 8 <0x00>;
    180	};
    181
    182	fan@1 {
    183		reg = <0x01>;
    184		aspeed,fan-tach-ch = /bits/ 8 <0x01>;
    185	};
    186
    187	fan@2 {
    188		reg = <0x02>;
    189		aspeed,fan-tach-ch = /bits/ 8 <0x02>;
    190	};
    191
    192	fan@3 {
    193		reg = <0x03>;
    194		aspeed,fan-tach-ch = /bits/ 8 <0x03>;
    195	};
    196
    197	fan@4 {
    198		reg = <0x04>;
    199		aspeed,fan-tach-ch = /bits/ 8 <0x04>;
    200	};
    201
    202	fan@5 {
    203		reg = <0x05>;
    204		aspeed,fan-tach-ch = /bits/ 8 <0x05>;
    205	};
    206
    207};