cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

aspeed-bmc-opp-mihawk.dts (23067B)


      1// SPDX-License-Identifier: GPL-2.0+
      2/dts-v1/;
      3#include "aspeed-g5.dtsi"
      4#include <dt-bindings/gpio/aspeed-gpio.h>
      5#include <dt-bindings/leds/leds-pca955x.h>
      6
      7/ {
      8	model = "Mihawk BMC";
      9	compatible = "ibm,mihawk-bmc", "aspeed,ast2500";
     10
     11	aliases {
     12		i2c215 = &bus6_mux215;
     13		i2c216 = &bus6_mux216;
     14		i2c217 = &bus6_mux217;
     15		i2c218 = &bus6_mux218;
     16		i2c219 = &bus6_mux219;
     17		i2c220 = &bus6_mux220;
     18		i2c221 = &bus6_mux221;
     19		i2c222 = &bus6_mux222;
     20		i2c223 = &bus7_mux223;
     21		i2c224 = &bus7_mux224;
     22		i2c225 = &bus7_mux225;
     23		i2c226 = &bus7_mux226;
     24		i2c227 = &bus7_mux227;
     25		i2c228 = &bus7_mux228;
     26		i2c229 = &bus7_mux229;
     27		i2c230 = &bus7_mux230;
     28		i2c231 = &bus9_mux231;
     29		i2c232 = &bus9_mux232;
     30		i2c233 = &bus9_mux233;
     31		i2c234 = &bus9_mux234;
     32		i2c235 = &bus9_mux235;
     33		i2c236 = &bus9_mux236;
     34		i2c237 = &bus9_mux237;
     35		i2c238 = &bus9_mux238;
     36		i2c239 = &bus10_mux239;
     37		i2c240 = &bus10_mux240;
     38		i2c241 = &bus10_mux241;
     39		i2c242 = &bus10_mux242;
     40		i2c243 = &bus10_mux243;
     41		i2c244 = &bus10_mux244;
     42		i2c245 = &bus10_mux245;
     43		i2c246 = &bus10_mux246;
     44		i2c247 = &bus12_mux247;
     45		i2c248 = &bus12_mux248;
     46		i2c249 = &bus12_mux249;
     47		i2c250 = &bus12_mux250;
     48		i2c251 = &bus13_mux251;
     49		i2c252 = &bus13_mux252;
     50		i2c253 = &bus13_mux253;
     51		i2c254 = &bus13_mux254;
     52		i2c255 = &bus13_mux255;
     53		i2c256 = &bus13_mux256;
     54		i2c257 = &bus13_mux257;
     55		i2c258 = &bus13_mux258;
     56	};
     57
     58	chosen {
     59		stdout-path = &uart5;
     60		bootargs = "console=ttyS4,115200 earlycon";
     61	};
     62
     63	memory@80000000 {
     64		reg = <0x80000000 0x20000000>;
     65	};
     66
     67	reserved-memory {
     68		#address-cells = <1>;
     69		#size-cells = <1>;
     70		ranges;
     71
     72		flash_memory: region@98000000 {
     73			no-map;
     74			reg = <0x98000000 0x04000000>; /* 64M */
     75		};
     76
     77		gfx_memory: framebuffer {
     78			size = <0x01000000>;
     79			alignment = <0x01000000>;
     80			compatible = "shared-dma-pool";
     81			reusable;
     82		};
     83
     84		video_engine_memory: jpegbuffer {
     85			size = <0x02000000>;
     86			alignment = <0x01000000>;
     87			compatible = "shared-dma-pool";
     88			reusable;
     89		};
     90	};
     91
     92	gpio-keys {
     93		compatible = "gpio-keys";
     94
     95		air-water {
     96			label = "air-water";
     97			gpios = <&gpio ASPEED_GPIO(F, 6) GPIO_ACTIVE_LOW>;
     98			linux,code = <ASPEED_GPIO(F, 6)>;
     99		};
    100
    101		checkstop {
    102			label = "checkstop";
    103			gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
    104			linux,code = <ASPEED_GPIO(J, 2)>;
    105		};
    106
    107		ps0-presence {
    108			label = "ps0-presence";
    109			gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>;
    110			linux,code = <ASPEED_GPIO(Z, 2)>;
    111		};
    112
    113		ps1-presence {
    114			label = "ps1-presence";
    115			gpios = <&gpio ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
    116			linux,code = <ASPEED_GPIO(Z, 0)>;
    117		};
    118		id-button {
    119			label = "id-button";
    120			gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>;
    121			linux,code = <ASPEED_GPIO(F, 1)>;
    122		};
    123	};
    124
    125	gpio-keys-polled {
    126		compatible = "gpio-keys-polled";
    127		poll-interval = <1000>;
    128
    129		fan0-presence {
    130			label = "fan0-presence";
    131			gpios = <&pca9552 9 GPIO_ACTIVE_LOW>;
    132			linux,code = <9>;
    133		};
    134
    135		fan1-presence {
    136			label = "fan1-presence";
    137			gpios = <&pca9552 10 GPIO_ACTIVE_LOW>;
    138			linux,code = <10>;
    139		};
    140
    141		fan2-presence {
    142			label = "fan2-presence";
    143			gpios = <&pca9552 11 GPIO_ACTIVE_LOW>;
    144			linux,code = <11>;
    145		};
    146
    147		fan3-presence {
    148			label = "fan3-presence";
    149			gpios = <&pca9552 12 GPIO_ACTIVE_LOW>;
    150			linux,code = <12>;
    151		};
    152
    153		fan4-presence {
    154			label = "fan4-presence";
    155			gpios = <&pca9552 13 GPIO_ACTIVE_LOW>;
    156			linux,code = <13>;
    157		};
    158
    159		fan5-presence {
    160			label = "fan5-presence";
    161			gpios = <&pca9552 14 GPIO_ACTIVE_LOW>;
    162			linux,code = <14>;
    163		};
    164	};
    165
    166	leds {
    167		compatible = "gpio-leds";
    168
    169		front-fault {
    170			retain-state-shutdown;
    171			default-state = "keep";
    172			gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_LOW>;
    173		};
    174
    175		power-button {
    176			retain-state-shutdown;
    177			default-state = "keep";
    178			gpios = <&gpio ASPEED_GPIO(AA, 1) GPIO_ACTIVE_LOW>;
    179		};
    180
    181		front-id {
    182			retain-state-shutdown;
    183			default-state = "keep";
    184			gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_LOW>;
    185		};
    186
    187
    188		fan0 {
    189			retain-state-shutdown;
    190			default-state = "keep";
    191			gpios = <&pca9552 0 GPIO_ACTIVE_LOW>;
    192		};
    193
    194		fan1 {
    195			retain-state-shutdown;
    196			default-state = "keep";
    197			gpios = <&pca9552 1 GPIO_ACTIVE_LOW>;
    198		};
    199
    200		fan2 {
    201			retain-state-shutdown;
    202			default-state = "keep";
    203			gpios = <&pca9552 2 GPIO_ACTIVE_LOW>;
    204		};
    205
    206		fan3 {
    207			retain-state-shutdown;
    208			default-state = "keep";
    209			gpios = <&pca9552 3 GPIO_ACTIVE_LOW>;
    210		};
    211
    212		fan4 {
    213			retain-state-shutdown;
    214			default-state = "keep";
    215			gpios = <&pca9552 4 GPIO_ACTIVE_LOW>;
    216		};
    217
    218		fan5 {
    219			retain-state-shutdown;
    220			default-state = "keep";
    221			gpios = <&pca9552 5 GPIO_ACTIVE_LOW>;
    222		};
    223	};
    224
    225	fsi: gpio-fsi {
    226		compatible = "fsi-master-gpio", "fsi-master";
    227		#address-cells = <2>;
    228		#size-cells = <0>;
    229		no-gpio-delays;
    230
    231		clock-gpios = <&gpio ASPEED_GPIO(E, 6) GPIO_ACTIVE_HIGH>;
    232		data-gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_HIGH>;
    233		mux-gpios = <&gpio ASPEED_GPIO(E, 5) GPIO_ACTIVE_HIGH>;
    234		enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
    235		trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
    236	};
    237	iio-hwmon-12v {
    238		compatible = "iio-hwmon";
    239		io-channels = <&adc 0>;
    240	};
    241
    242	iio-hwmon-5v {
    243		compatible = "iio-hwmon";
    244		io-channels = <&adc 1>;
    245	};
    246
    247	iio-hwmon-3v {
    248		compatible = "iio-hwmon";
    249		io-channels = <&adc 2>;
    250	};
    251
    252	iio-hwmon-vdd0 {
    253		compatible = "iio-hwmon";
    254		io-channels = <&adc 3>;
    255	};
    256
    257	iio-hwmon-vdd1 {
    258		compatible = "iio-hwmon";
    259		io-channels = <&adc 4>;
    260	};
    261
    262	iio-hwmon-vcs0 {
    263		compatible = "iio-hwmon";
    264		io-channels = <&adc 5>;
    265	};
    266
    267	iio-hwmon-vcs1 {
    268		compatible = "iio-hwmon";
    269		io-channels = <&adc 6>;
    270	};
    271
    272	iio-hwmon-vdn0 {
    273		compatible = "iio-hwmon";
    274		io-channels = <&adc 7>;
    275	};
    276
    277	iio-hwmon-vdn1 {
    278		compatible = "iio-hwmon";
    279		io-channels = <&adc 8>;
    280	};
    281
    282	iio-hwmon-vio0 {
    283		compatible = "iio-hwmon";
    284		io-channels = <&adc 9>;
    285	};
    286
    287	iio-hwmon-vio1 {
    288		compatible = "iio-hwmon";
    289		io-channels = <&adc 10>;
    290	};
    291
    292	iio-hwmon-vddra {
    293		compatible = "iio-hwmon";
    294		io-channels = <&adc 11>;
    295	};
    296
    297	iio-hwmon-battery {
    298		compatible = "iio-hwmon";
    299		io-channels = <&adc 12>;
    300	};
    301
    302	iio-hwmon-vddrb {
    303		compatible = "iio-hwmon";
    304		io-channels = <&adc 13>;
    305	};
    306
    307	iio-hwmon-vddrc {
    308		compatible = "iio-hwmon";
    309		io-channels = <&adc 14>;
    310	};
    311
    312	iio-hwmon-vddrd {
    313		compatible = "iio-hwmon";
    314		io-channels = <&adc 15>;
    315	};
    316};
    317
    318&pwm_tacho {
    319	status = "okay";
    320	pinctrl-names = "default";
    321	pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
    322		&pinctrl_pwm2_default &pinctrl_pwm3_default
    323		&pinctrl_pwm4_default &pinctrl_pwm5_default>;
    324
    325	fan@0 {
    326		reg = <0x00>;
    327		aspeed,fan-tach-ch = /bits/ 8 <0x00>;
    328	};
    329
    330	fan@1 {
    331		reg = <0x01>;
    332		aspeed,fan-tach-ch = /bits/ 8 <0x01>;
    333	};
    334
    335	fan@2 {
    336		reg = <0x02>;
    337		aspeed,fan-tach-ch = /bits/ 8 <0x02>;
    338	};
    339
    340	fan@3 {
    341		reg = <0x03>;
    342		aspeed,fan-tach-ch = /bits/ 8 <0x03>;
    343	};
    344
    345	fan@4 {
    346		reg = <0x04>;
    347		aspeed,fan-tach-ch = /bits/ 8 <0x04>;
    348	};
    349
    350	fan@5 {
    351		reg = <0x05>;
    352		aspeed,fan-tach-ch = /bits/ 8 <0x05>;
    353	};
    354
    355	fan@6 {
    356		reg = <0x00>;
    357		aspeed,fan-tach-ch = /bits/ 8 <0x06>;
    358	};
    359
    360	fan@7 {
    361		reg = <0x01>;
    362		aspeed,fan-tach-ch = /bits/ 8 <0x07>;
    363	};
    364
    365	fan@8 {
    366		reg = <0x02>;
    367		aspeed,fan-tach-ch = /bits/ 8 <0x08>;
    368	};
    369
    370	fan@9 {
    371		reg = <0x03>;
    372		aspeed,fan-tach-ch = /bits/ 8 <0x09>;
    373	};
    374
    375	fan@10 {
    376		reg = <0x04>;
    377		aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
    378	};
    379
    380	fan@11 {
    381		reg = <0x05>;
    382		aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
    383	};
    384};
    385
    386&gpio {
    387	gpio-line-names =
    388	/*A0-A7*/	"","cfam-reset","","","","","","",
    389	/*B0-B7*/	"","","","","","","","",
    390	/*C0-C7*/	"","","","","","","","",
    391	/*D0-D7*/	"fsi-enable","","","","","","","",
    392	/*E0-E7*/	"","","","","","fsi-mux","fsi-clock","fsi-data",
    393	/*F0-F7*/	"","id-button","","","","","air-water","",
    394	/*G0-G7*/	"","","","","","","","",
    395	/*H0-H7*/	"","","","","","","","",
    396	/*I0-I7*/	"","","","","","","","",
    397	/*J0-J7*/	"","","checkstop","","","","","",
    398	/*K0-K7*/	"","","","","","","","",
    399	/*L0-L7*/	"","","","","","","","",
    400	/*M0-M7*/	"","","","","","","","",
    401	/*N0-N7*/	"","","","","","","","",
    402	/*O0-O7*/	"","","","","","","","",
    403	/*P0-P7*/	"","","","","","","","",
    404	/*Q0-Q7*/	"","","","","","","","",
    405	/*R0-R7*/	"","","fsi-trans","","","","","",
    406	/*S0-S7*/	"","","","","","","","",
    407	/*T0-T7*/	"","","","","","","","",
    408	/*U0-U7*/	"","","","","","","","",
    409	/*V0-V7*/	"","","","","","","","",
    410	/*W0-W7*/	"","","","","","","","",
    411	/*X0-X7*/	"","","","","","","","",
    412	/*Y0-Y7*/	"","","","","","","","",
    413	/*Z0-Z7*/	"presence-ps1","","presence-ps0","","","","","",
    414	/*AA0-AA7*/	"led-front-fault","power-button","led-front-id","","","","","",
    415	/*AB0-AB7*/	"","","","","","","","",
    416	/*AC0-AC7*/	"","","","","","","","";
    417};
    418
    419&fmc {
    420	status = "okay";
    421	flash@0 {
    422		status = "okay";
    423		label = "bmc";
    424		m25p,fast-read;
    425		spi-max-frequency = <50000000>;
    426		partitions {
    427			#address-cells = < 1 >;
    428			#size-cells = < 1 >;
    429			compatible = "fixed-partitions";
    430			u-boot@0 {
    431				reg = < 0 0x60000 >;
    432				label = "u-boot";
    433			};
    434			u-boot-env@60000 {
    435				reg = < 0x60000 0x20000 >;
    436				label = "u-boot-env";
    437			};
    438			obmc-ubi@80000 {
    439				reg = < 0x80000 0x1F80000 >;
    440				label = "obmc-ubi";
    441			};
    442		};
    443	};
    444	flash@1 {
    445		status = "okay";
    446		label = "alt-bmc";
    447		m25p,fast-read;
    448		spi-max-frequency = <50000000>;
    449		partitions {
    450			#address-cells = < 1 >;
    451			#size-cells = < 1 >;
    452			compatible = "fixed-partitions";
    453			u-boot@0 {
    454				reg = < 0 0x60000 >;
    455				label = "alt-u-boot";
    456			};
    457			u-boot-env@60000 {
    458				reg = < 0x60000 0x20000 >;
    459				label = "alt-u-boot-env";
    460			};
    461			obmc-ubi@80000 {
    462				reg = < 0x80000 0x1F80000 >;
    463				label = "alt-obmc-ubi";
    464			};
    465		};
    466	};
    467};
    468
    469&spi1 {
    470	status = "okay";
    471	pinctrl-names = "default";
    472	pinctrl-0 = <&pinctrl_spi1_default>;
    473
    474	flash@0 {
    475		status = "okay";
    476		label = "pnor";
    477		m25p,fast-read;
    478		spi-max-frequency = <100000000>;
    479	};
    480};
    481
    482&lpc_ctrl {
    483	status = "okay";
    484	memory-region = <&flash_memory>;
    485	flash = <&spi1>;
    486};
    487
    488&uart1 {
    489	/* Rear RS-232 connector */
    490	status = "okay";
    491
    492	pinctrl-names = "default";
    493	pinctrl-0 = <&pinctrl_txd1_default
    494			&pinctrl_rxd1_default
    495			&pinctrl_nrts1_default
    496			&pinctrl_ndtr1_default
    497			&pinctrl_ndsr1_default
    498			&pinctrl_ncts1_default
    499			&pinctrl_ndcd1_default
    500			&pinctrl_nri1_default>;
    501};
    502
    503&uart2 {
    504	/* APSS */
    505	status = "okay";
    506
    507	pinctrl-names = "default";
    508	pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
    509};
    510
    511&uart5 {
    512	status = "okay";
    513};
    514
    515&mac0 {
    516	status = "okay";
    517
    518	pinctrl-names = "default";
    519	pinctrl-0 = <&pinctrl_rmii1_default>;
    520	clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
    521		 <&syscon ASPEED_CLK_MAC1RCLK>;
    522	clock-names = "MACCLK", "RCLK";
    523	use-ncsi;
    524};
    525
    526&mac1 {
    527	status = "okay";
    528
    529	pinctrl-names = "default";
    530	pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
    531};
    532
    533&i2c0 {
    534	status = "disabled";
    535};
    536
    537&i2c1 {
    538	status = "disabled";
    539};
    540
    541&i2c2 {
    542	status = "okay";
    543
    544	/* SAMTEC P0 */
    545	/* SAMTEC P1 */
    546
    547};
    548
    549&i2c3 {
    550	status = "okay";
    551
    552	/* APSS */
    553	/* CPLD */
    554
    555	/* PCA9516 (repeater) ->
    556	 *    CLK Buffer 9FGS9092
    557	 *    CLK Buffer 9DBL0651BKILFT
    558	 *    CLK Buffer 9DBL0651BKILFT
    559	 *    Power Supply 0
    560	 *    Power Supply 1
    561	 *    PCA 9552 LED
    562	 */
    563
    564	power-supply@58 {
    565		compatible = "ibm,cffps1";
    566		reg = <0x58>;
    567	};
    568
    569	power-supply@5b {
    570		compatible = "ibm,cffps1";
    571		reg = <0x5b>;
    572	};
    573
    574	pca9552: pca9552@60 {
    575		compatible = "nxp,pca9552";
    576		reg = <0x60>;
    577		#address-cells = <1>;
    578		#size-cells = <0>;
    579		gpio-controller;
    580		#gpio-cells = <2>;
    581
    582		gpio@0 {
    583			reg = <0>;
    584			type = <PCA955X_TYPE_GPIO>;
    585		};
    586		gpio@1 {
    587			reg = <1>;
    588			type = <PCA955X_TYPE_GPIO>;
    589		};
    590		gpio@2 {
    591			reg = <2>;
    592			type = <PCA955X_TYPE_GPIO>;
    593		};
    594		gpio@3 {
    595			reg = <3>;
    596			type = <PCA955X_TYPE_GPIO>;
    597		};
    598		gpio@4 {
    599			reg = <4>;
    600			type = <PCA955X_TYPE_GPIO>;
    601		};
    602		gpio@5 {
    603			reg = <5>;
    604			type = <PCA955X_TYPE_GPIO>;
    605		};
    606		gpio@6 {
    607			reg = <6>;
    608			type = <PCA955X_TYPE_GPIO>;
    609		};
    610		gpio@7 {
    611			reg = <7>;
    612			type = <PCA955X_TYPE_GPIO>;
    613		};
    614		gpio@8 {
    615			reg = <8>;
    616			type = <PCA955X_TYPE_GPIO>;
    617		};
    618		gpio@9 {
    619			reg = <9>;
    620			type = <PCA955X_TYPE_GPIO>;
    621		};
    622		gpio@10 {
    623			reg = <10>;
    624			type = <PCA955X_TYPE_GPIO>;
    625		};
    626		gpio@11 {
    627			reg = <11>;
    628			type = <PCA955X_TYPE_GPIO>;
    629		};
    630		gpio@12 {
    631			reg = <12>;
    632			type = <PCA955X_TYPE_GPIO>;
    633		};
    634		gpio@13 {
    635			reg = <13>;
    636			type = <PCA955X_TYPE_GPIO>;
    637		};
    638		gpio@14 {
    639			reg = <14>;
    640			type = <PCA955X_TYPE_GPIO>;
    641		};
    642		gpio@15 {
    643			reg = <15>;
    644			type = <PCA955X_TYPE_GPIO>;
    645		};
    646
    647	};
    648
    649};
    650
    651&i2c4 {
    652	status = "okay";
    653
    654	/* CP0 VDD & VCS : IR35221 */
    655	/* CP0 VDN : IR35221 */
    656	/* CP0 VIO : IR38064 */
    657	/* CP0 VDDR : PXM1330 */
    658
    659	ir35221@70 {
    660		compatible = "infineon,ir35221";
    661		reg = <0x70>;
    662	};
    663
    664	ir35221@72 {
    665		compatible = "infineon,ir35221";
    666		reg = <0x72>;
    667	};
    668
    669};
    670
    671&i2c5 {
    672	status = "okay";
    673
    674	/* CP0 VDD & VCS : IR35221 */
    675	/* CP0 VDN : IR35221 */
    676	/* CP0 VIO : IR38064 */
    677	/* CP0 VDDR : PXM1330 */
    678
    679	ir35221@70 {
    680		compatible = "infineon,ir35221";
    681		reg = <0x70>;
    682	};
    683
    684	ir35221@72 {
    685		compatible = "infineon,ir35221";
    686		reg = <0x72>;
    687	};
    688
    689};
    690
    691&i2c6 {
    692	status = "okay";
    693
    694	/* pca9548 -> NVMe1 to 8 */
    695
    696	pca9548@70 {
    697		compatible = "nxp,pca9548";
    698		#address-cells = <1>;
    699		#size-cells = <0>;
    700		reg = <0x70>;
    701
    702		bus7_mux223: i2c@0 {
    703			#address-cells = <1>;
    704			#size-cells = <0>;
    705			reg = <0>;
    706		};
    707
    708		bus7_mux224: i2c@1 {
    709			#address-cells = <1>;
    710			#size-cells = <0>;
    711			reg = <1>;
    712		};
    713
    714		bus7_mux225: i2c@2 {
    715			#address-cells = <1>;
    716			#size-cells = <0>;
    717			reg = <2>;
    718		};
    719
    720		bus7_mux226: i2c@3 {
    721			#address-cells = <1>;
    722			#size-cells = <0>;
    723			reg = <3>;
    724		};
    725
    726		bus7_mux227: i2c@4 {
    727			#address-cells = <1>;
    728			#size-cells = <0>;
    729			reg = <4>;
    730		};
    731
    732		bus7_mux228: i2c@5 {
    733			#address-cells = <1>;
    734			#size-cells = <0>;
    735			reg = <5>;
    736		};
    737
    738		bus7_mux229: i2c@6 {
    739			#address-cells = <1>;
    740			#size-cells = <0>;
    741			reg = <6>;
    742		};
    743
    744		bus7_mux230: i2c@7 {
    745			#address-cells = <1>;
    746			#size-cells = <0>;
    747			reg = <7>;
    748		};
    749	};
    750
    751};
    752
    753&i2c7 {
    754	status = "okay";
    755
    756	/* pca9548 -> NVMe9 to 16 */
    757
    758	pca9548@70 {
    759		compatible = "nxp,pca9548";
    760		#address-cells = <1>;
    761		#size-cells = <0>;
    762		reg = <0x70>;
    763
    764		bus6_mux215: i2c@0 {
    765			#address-cells = <1>;
    766			#size-cells = <0>;
    767			reg = <0>;
    768		};
    769
    770		bus6_mux216: i2c@1 {
    771			#address-cells = <1>;
    772			#size-cells = <0>;
    773			reg = <1>;
    774		};
    775
    776		bus6_mux217: i2c@2 {
    777			#address-cells = <1>;
    778			#size-cells = <0>;
    779			reg = <2>;
    780		};
    781
    782		bus6_mux218: i2c@3 {
    783			#address-cells = <1>;
    784			#size-cells = <0>;
    785			reg = <3>;
    786		};
    787
    788		bus6_mux219: i2c@4 {
    789			#address-cells = <1>;
    790			#size-cells = <0>;
    791			reg = <4>;
    792		};
    793
    794		bus6_mux220: i2c@5 {
    795			#address-cells = <1>;
    796			#size-cells = <0>;
    797			reg = <5>;
    798		};
    799
    800		bus6_mux221: i2c@6 {
    801			#address-cells = <1>;
    802			#size-cells = <0>;
    803			reg = <6>;
    804		};
    805
    806		bus6_mux222: i2c@7 {
    807			#address-cells = <1>;
    808			#size-cells = <0>;
    809			reg = <7>;
    810		};
    811	};
    812
    813};
    814
    815&i2c8 {
    816	status = "okay";
    817
    818	eeprom@50 {
    819		compatible = "atmel,24c64";
    820		reg = <0x50>;
    821	};
    822};
    823
    824&i2c9 {
    825	status = "okay";
    826
    827	/* pca9545 Riser ->
    828	*	PCIe x8  Slot3
    829	*	PCIe x16 slot4
    830	*	PCIe x8  slot5
    831	*	I2C BMC RISER PCA9554
    832	*	BMC SCL/SDA PCA9554
    833	*	PCA9554
    834	*/
    835
    836	/* pca9545 ->
    837	*	PCIe x16 Slot1
    838	*	PCIe x8  slot2
    839	*	PEX8748
    840	*/
    841
    842	pca9545riser@70 {
    843		compatible = "nxp,pca9545";
    844		#address-cells = <1>;
    845		#size-cells = <0>;
    846		reg = <0x70>;
    847
    848		i2c-mux-idle-disconnect;
    849		interrupt-controller;
    850		#interrupt-cells = <2>;
    851
    852		bus9_mux231: i2c@0 {
    853			#address-cells = <1>;
    854			#size-cells = <0>;
    855			reg = <0>;
    856
    857			tca9554@39 {
    858				compatible = "ti,tca9554";
    859				reg = <0x39>;
    860				gpio-controller;
    861				#gpio-cells = <2>;
    862
    863				smbus0-hog {
    864					gpio-hog;
    865					gpios = <4 GPIO_ACTIVE_HIGH>;
    866					output-high;
    867					line-name = "smbus0";
    868				};
    869			};
    870
    871			tmp431@4c {
    872				compatible = "ti,tmp401";
    873				reg = <0x4c>;
    874			};
    875		};
    876
    877		bus9_mux232: i2c@1 {
    878			#address-cells = <1>;
    879			#size-cells = <0>;
    880			reg = <1>;
    881
    882			tca9554@39 {
    883				compatible = "ti,tca9554";
    884				reg = <0x39>;
    885				gpio-controller;
    886				#gpio-cells = <2>;
    887
    888				smbus1-hog {
    889					gpio-hog;
    890					gpios = <4 GPIO_ACTIVE_HIGH>;
    891					output-high;
    892					line-name = "smbus1";
    893				};
    894			};
    895
    896			tmp431@4c {
    897				compatible = "ti,tmp401";
    898				reg = <0x4c>;
    899			};
    900		};
    901
    902		bus9_mux233: i2c@2 {
    903			#address-cells = <1>;
    904			#size-cells = <0>;
    905			reg = <2>;
    906		};
    907
    908		bus9_mux234: i2c@3 {
    909			#address-cells = <1>;
    910			#size-cells = <0>;
    911			reg = <3>;
    912		};
    913	};
    914
    915	pca9545@71 {
    916		compatible = "nxp,pca9545";
    917		#address-cells = <1>;
    918		#size-cells = <0>;
    919		reg = <0x71>;
    920
    921		i2c-mux-idle-disconnect;
    922		interrupt-controller;
    923		#interrupt-cells = <2>;
    924
    925		bus9_mux235: i2c@0 {
    926			#address-cells = <1>;
    927			#size-cells = <0>;
    928			reg = <0>;
    929
    930			tca9554@39 {
    931				compatible = "ti,tca9554";
    932				reg = <0x39>;
    933				gpio-controller;
    934				#gpio-cells = <2>;
    935
    936				smbus2-hog {
    937					gpio-hog;
    938					gpios = <4 GPIO_ACTIVE_HIGH>;
    939					output-high;
    940					line-name = "smbus2";
    941				};
    942			};
    943
    944			tmp431@4c {
    945				compatible = "ti,tmp401";
    946				reg = <0x4c>;
    947			};
    948		};
    949
    950		bus9_mux236: i2c@1 {
    951			#address-cells = <1>;
    952			#size-cells = <0>;
    953			reg = <1>;
    954
    955			tca9554@39 {
    956				compatible = "ti,tca9554";
    957				reg = <0x39>;
    958				gpio-controller;
    959				#gpio-cells = <2>;
    960
    961				smbus3-hog {
    962					gpio-hog;
    963					gpios = <4 GPIO_ACTIVE_HIGH>;
    964					output-high;
    965					line-name = "smbus3";
    966				};
    967			};
    968
    969			tmp431@4c {
    970				compatible = "ti,tmp401";
    971				reg = <0x4c>;
    972			};
    973		};
    974
    975		bus9_mux237: i2c@2 {
    976			#address-cells = <1>;
    977			#size-cells = <0>;
    978			reg = <2>;
    979		};
    980
    981		bus9_mux238: i2c@3 {
    982			#address-cells = <1>;
    983			#size-cells = <0>;
    984			reg = <3>;
    985		};
    986	};
    987};
    988
    989&i2c10 {
    990	status = "okay";
    991
    992	/* pca9545 Riser ->
    993	* 	PCIe x8  Slot8
    994	* 	PCIe x16 slot9
    995	* 	PCIe x8  slot10
    996	* 	I2C BMC RISER PCA9554
    997	* 	BMC SCL/SDA PCA9554
    998	* 	PCA9554
    999	*/
   1000
   1001	/* pca9545 ->
   1002	*	PCIe x16 Slot1
   1003	*	PCIe x8  slot2
   1004	*	PEX8748
   1005	*/
   1006
   1007	pca9545riser@70 {
   1008		compatible = "nxp,pca9545";
   1009		#address-cells = <1>;
   1010		#size-cells = <0>;
   1011		reg = <0x70>;
   1012
   1013		i2c-mux-idle-disconnect;
   1014		interrupt-controller;
   1015		#interrupt-cells = <2>;
   1016
   1017		bus10_mux239: i2c@0 {
   1018			#address-cells = <1>;
   1019			#size-cells = <0>;
   1020			reg = <0>;
   1021
   1022			tca9554@39 {
   1023				compatible = "ti,tca9554";
   1024				reg = <0x39>;
   1025				gpio-controller;
   1026				#gpio-cells = <2>;
   1027
   1028				smbus4-hog {
   1029					gpio-hog;
   1030					gpios = <4 GPIO_ACTIVE_HIGH>;
   1031					output-high;
   1032					line-name = "smbus4";
   1033				};
   1034			};
   1035
   1036			tmp431@4c {
   1037				compatible = "ti,tmp401";
   1038				reg = <0x4c>;
   1039			};
   1040		};
   1041
   1042		bus10_mux240: i2c@1 {
   1043			#address-cells = <1>;
   1044			#size-cells = <0>;
   1045			reg = <1>;
   1046
   1047			tca9554@39 {
   1048				compatible = "ti,tca9554";
   1049				reg = <0x39>;
   1050				gpio-controller;
   1051				#gpio-cells = <2>;
   1052
   1053				smbus5-hog {
   1054					gpio-hog;
   1055					gpios = <4 GPIO_ACTIVE_HIGH>;
   1056					output-high;
   1057					line-name = "smbus5";
   1058				};
   1059			};
   1060
   1061			tmp431@4c {
   1062				compatible = "ti,tmp401";
   1063				reg = <0x4c>;
   1064			};
   1065		};
   1066
   1067		bus10_mux241: i2c@2 {
   1068			#address-cells = <1>;
   1069			#size-cells = <0>;
   1070			reg = <2>;
   1071		};
   1072
   1073		bus10_mux242: i2c@3 {
   1074			#address-cells = <1>;
   1075			#size-cells = <0>;
   1076			reg = <3>;
   1077		};
   1078	};
   1079
   1080	pca9545@71 {
   1081		compatible = "nxp,pca9545";
   1082		#address-cells = <1>;
   1083		#size-cells = <0>;
   1084		reg = <0x71>;
   1085
   1086		i2c-mux-idle-disconnect;
   1087		interrupt-controller;
   1088		#interrupt-cells = <2>;
   1089
   1090		bus10_mux243: i2c@0 {
   1091			#address-cells = <1>;
   1092			#size-cells = <0>;
   1093			reg = <0>;
   1094
   1095			tca9554@39 {
   1096				compatible = "ti,tca9554";
   1097				reg = <0x39>;
   1098				gpio-controller;
   1099				#gpio-cells = <2>;
   1100
   1101				smbus6-hog {
   1102					gpio-hog;
   1103					gpios = <4 GPIO_ACTIVE_HIGH>;
   1104					output-high;
   1105					line-name = "smbus6";
   1106				};
   1107			};
   1108
   1109			tmp431@4c {
   1110				compatible = "ti,tmp401";
   1111				reg = <0x4c>;
   1112			};
   1113		};
   1114
   1115		bus10_mux244: i2c@1 {
   1116			#address-cells = <1>;
   1117			#size-cells = <0>;
   1118			reg = <1>;
   1119
   1120			tca9554@39 {
   1121				compatible = "ti,tca9554";
   1122				reg = <0x39>;
   1123				gpio-controller;
   1124				#gpio-cells = <2>;
   1125
   1126				smbus7-hog {
   1127					gpio-hog;
   1128					gpios = <4 GPIO_ACTIVE_HIGH>;
   1129					output-high;
   1130					line-name = "smbus7";
   1131				};
   1132			};
   1133
   1134			tmp431@4c {
   1135				compatible = "ti,tmp401";
   1136				reg = <0x4c>;
   1137			};
   1138		};
   1139
   1140		bus10_mux245: i2c@2 {
   1141			#address-cells = <1>;
   1142			#size-cells = <0>;
   1143			reg = <2>;
   1144		};
   1145
   1146		bus10_mux246: i2c@3 {
   1147			#address-cells = <1>;
   1148			#size-cells = <0>;
   1149			reg = <3>;
   1150		};
   1151	};
   1152};
   1153
   1154&i2c11 {
   1155	status = "okay";
   1156
   1157	/* TPM */
   1158	/* RTC RX8900CE */
   1159	/* FPGA for power sequence */
   1160	/* TMP275A */
   1161	/* TMP275A */
   1162	/* EMC1462 */
   1163
   1164	tpm@57 {
   1165		compatible = "infineon,slb9645tt";
   1166		reg = <0x57>;
   1167	};
   1168
   1169	rtc@32 {
   1170		compatible = "epson,rx8900";
   1171		reg = <0x32>;
   1172	};
   1173
   1174	tmp275@48 {
   1175		compatible = "ti,tmp275";
   1176		reg = <0x48>;
   1177	};
   1178
   1179	tmp275@49 {
   1180		compatible = "ti,tmp275";
   1181		reg = <0x49>;
   1182	};
   1183
   1184	/* chip emc1462 use emc1403 driver */
   1185	emc1403@4c {
   1186		compatible = "smsc,emc1403";
   1187		reg = <0x4c>;
   1188	};
   1189
   1190};
   1191
   1192&i2c12 {
   1193	status = "okay";
   1194
   1195	/* pca9545 ->
   1196	*	SAS BP1
   1197	*	SAS BP2
   1198	*	NVMe BP
   1199	*	M.2 riser
   1200	*/
   1201
   1202	pca9545@70 {
   1203		compatible = "nxp,pca9545";
   1204		#address-cells = <1>;
   1205		#size-cells = <0>;
   1206		reg = <0x70>;
   1207
   1208		interrupt-controller;
   1209		#interrupt-cells = <2>;
   1210
   1211		bus12_mux247: i2c@0 {
   1212			#address-cells = <1>;
   1213			#size-cells = <0>;
   1214			reg = <0>;
   1215
   1216			eeprom@50 {
   1217				compatible = "atmel,24c64";
   1218				reg = <0x50>;
   1219			};
   1220		};
   1221
   1222		bus12_mux248: i2c@1 {
   1223			#address-cells = <1>;
   1224			#size-cells = <0>;
   1225			reg = <1>;
   1226
   1227			eeprom@50 {
   1228				compatible = "atmel,24c64";
   1229				reg = <0x50>;
   1230			};
   1231		};
   1232
   1233		bus12_mux249: i2c@2 {
   1234			#address-cells = <1>;
   1235			#size-cells = <0>;
   1236			reg = <2>;
   1237
   1238			eeprom@50 {
   1239				compatible = "atmel,24c64";
   1240				reg = <0x50>;
   1241			};
   1242		};
   1243
   1244		bus12_mux250: i2c@3 {
   1245			#address-cells = <1>;
   1246			#size-cells = <0>;
   1247			reg = <3>;
   1248
   1249			tmp275@48 {
   1250				compatible = "ti,tmp275";
   1251				reg = <0x48>;
   1252			};
   1253		};
   1254
   1255	};
   1256
   1257};
   1258
   1259&i2c13 {
   1260	status = "okay";
   1261
   1262	/* pca9548 ->
   1263	*	NVMe BP
   1264	*	NVMe HDD17 to 24
   1265	*/
   1266
   1267	pca9548@70 {
   1268		compatible = "nxp,pca9548";
   1269		#address-cells = <1>;
   1270		#size-cells = <0>;
   1271		reg = <0x70>;
   1272		bus13_mux251: i2c@0 {
   1273			#address-cells = <1>;
   1274			#size-cells = <0>;
   1275			reg = <0>;
   1276		};
   1277
   1278		bus13_mux252: i2c@1 {
   1279			#address-cells = <1>;
   1280			#size-cells = <0>;
   1281			reg = <1>;
   1282		};
   1283
   1284		bus13_mux253: i2c@2 {
   1285			#address-cells = <1>;
   1286			#size-cells = <0>;
   1287			reg = <2>;
   1288		};
   1289
   1290		bus13_mux254: i2c@3 {
   1291			#address-cells = <1>;
   1292			#size-cells = <0>;
   1293			reg = <3>;
   1294		};
   1295
   1296		bus13_mux255: i2c@4 {
   1297			#address-cells = <1>;
   1298			#size-cells = <0>;
   1299			reg = <4>;
   1300		};
   1301
   1302		bus13_mux256: i2c@5 {
   1303			#address-cells = <1>;
   1304			#size-cells = <0>;
   1305			reg = <5>;
   1306		};
   1307
   1308		bus13_mux257: i2c@6 {
   1309			#address-cells = <1>;
   1310			#size-cells = <0>;
   1311			reg = <6>;
   1312		};
   1313
   1314		bus13_mux258: i2c@7 {
   1315			#address-cells = <1>;
   1316			#size-cells = <0>;
   1317			reg = <7>;
   1318		};
   1319	};
   1320};
   1321
   1322&vuart {
   1323	status = "okay";
   1324};
   1325
   1326&gfx {
   1327	status = "okay";
   1328	memory-region = <&gfx_memory>;
   1329};
   1330
   1331&adc {
   1332	status = "okay";
   1333	pinctrl-names = "default";
   1334	pinctrl-0 = <&pinctrl_adc0_default
   1335			&pinctrl_adc1_default
   1336			&pinctrl_adc2_default
   1337			&pinctrl_adc3_default
   1338			&pinctrl_adc4_default
   1339			&pinctrl_adc5_default
   1340			&pinctrl_adc6_default
   1341			&pinctrl_adc7_default
   1342			&pinctrl_adc8_default
   1343			&pinctrl_adc9_default
   1344			&pinctrl_adc10_default
   1345			&pinctrl_adc11_default
   1346			&pinctrl_adc12_default
   1347			&pinctrl_adc13_default
   1348			&pinctrl_adc14_default
   1349			&pinctrl_adc15_default>;
   1350};
   1351
   1352&wdt1 {
   1353	aspeed,reset-type = "none";
   1354	aspeed,external-signal;
   1355	aspeed,ext-push-pull;
   1356	aspeed,ext-active-high;
   1357
   1358	pinctrl-names = "default";
   1359	pinctrl-0 = <&pinctrl_wdtrst1_default>;
   1360};
   1361
   1362&wdt2 {
   1363	aspeed,alt-boot;
   1364};
   1365
   1366&ibt {
   1367	status = "okay";
   1368};
   1369
   1370&vhub {
   1371	status = "okay";
   1372};
   1373
   1374&video {
   1375	status = "okay";
   1376	memory-region = <&video_engine_memory>;
   1377};
   1378
   1379#include "ibm-power9-dual.dtsi"
   1380