cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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at91-dvk_su60_somc.dtsi (2408B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * at91-dvk_su60_somc.dtsi - Device Tree file for the DVK SOM60 base board
      4 *
      5 *  Copyright (C) 2018 Laird,
      6 *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
      7 *
      8 */
      9
     10/ {
     11	sound {
     12		compatible = "atmel,asoc-wm8904";
     13		pinctrl-names = "default";
     14		pinctrl-0 = <&pinctrl_pck2_as_audio_mck>;
     15
     16		atmel,model = "wm8904 @ DVK-SOM60";
     17		atmel,audio-routing =
     18			"Headphone Jack", "HPOUTL",
     19			"Headphone Jack", "HPOUTR",
     20			"IN2L", "Line In Jack",
     21			"IN2R", "Line In Jack",
     22			"Mic", "MICBIAS",
     23			"IN1L", "Mic";
     24
     25		atmel,ssc-controller = <&ssc0>;
     26		atmel,audio-codec = <&wm8904>;
     27
     28		status = "okay";
     29	};
     30};
     31
     32&mmc0 {
     33	status = "okay";
     34
     35	pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
     36	slot@0 {
     37		bus-width = <4>;
     38		cd-gpios = <&pioE 31 GPIO_ACTIVE_HIGH>;
     39		cd-inverted;
     40	};
     41};
     42
     43&spi0 {
     44	status = "okay";
     45
     46	/* spi0.0: 4M Flash Macronix MX25R4035FM1IL0 */
     47	flash@0 {
     48		compatible = "mxicy,mx25u4035", "jedec,spi-nor";
     49		spi-max-frequency = <33000000>;
     50		reg = <0>;
     51	};
     52};
     53
     54&ssc0 {
     55	atmel,clk-from-rk-pin;
     56	status = "okay";
     57};
     58
     59&i2c0 {
     60	status = "okay";
     61
     62	wm8904: wm8904@1a {
     63		compatible = "wlf,wm8904";
     64		reg = <0x1a>;
     65		clocks = <&pmc PMC_TYPE_SYSTEM 10>;
     66		clock-names = "mclk";
     67	};
     68};
     69
     70&i2c1 {
     71	status = "okay";
     72
     73	eeprom@57 {
     74		compatible = "giantec,gt24c32a", "atmel,24c32";
     75		reg = <0x57>;
     76		pagesize = <32>;
     77	};
     78};
     79
     80&usart1 {
     81	status = "okay";
     82};
     83
     84&usart2 {
     85	status = "okay";
     86};
     87
     88&usart3 {
     89	status = "okay";
     90};
     91
     92&uart0 {
     93	status = "okay";
     94};
     95
     96&dbgu {
     97	status = "okay";
     98};
     99
    100&pit {
    101	status = "okay";
    102};
    103
    104&adc0 {
    105	status = "okay";
    106};
    107
    108&can1 {
    109	status = "okay";
    110};
    111
    112&macb0 {
    113	#address-cells = <1>;
    114	#size-cells = <0>;
    115	status = "okay";
    116
    117	ethernet-phy@7 {
    118		reg = <7>;
    119		pinctrl-names = "default";
    120		pinctrl-0 = <&pinctrl_geth_int>;
    121		interrupt-parent = <&pioB>;
    122		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
    123		txen-skew-ps = <800>;
    124		txc-skew-ps = <3000>;
    125		rxdv-skew-ps = <400>;
    126		rxc-skew-ps = <3000>;
    127		rxd0-skew-ps = <400>;
    128		rxd1-skew-ps = <400>;
    129		rxd2-skew-ps = <400>;
    130		rxd3-skew-ps = <400>;
    131	};
    132};
    133
    134&macb1 {
    135	#address-cells = <1>;
    136	#size-cells = <0>;
    137	status = "okay";
    138
    139	ethernet-phy@1 {
    140		reg = <1>;
    141		pinctrl-names = "default";
    142		pinctrl-0 = <&pinctrl_eth_int>;
    143		interrupt-parent = <&pioC>;
    144		interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
    145	};
    146};
    147
    148&usb0 {
    149	status = "okay";
    150};
    151
    152&usb1 {
    153	status = "okay";
    154};
    155
    156&usb2 {
    157	status = "okay";
    158};
    159