cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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at91-linea.dtsi (1104B)

      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * at91-linea.dtsi - Device Tree Include file for the Axentia Linea Module.
      4 *
      5 * Copyright (C) 2017 Axentia Technologies AB
      6 *
      7 * Author: Peter Rosin <peda@axentia.se>
      8 */
      9
     10#include "sama5d31.dtsi"
     11
     12/ {
     13	compatible = "axentia,linea",
     14		     "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
     15
     16	memory@20000000 {
     17		reg = <0x20000000 0x4000000>;
     18	};
     19};
     20
     21&slow_xtal {
     22	clock-frequency = <32768>;
     23};
     24
     25&main_xtal {
     26	clock-frequency = <12000000>;
     27};
     28
     29&tcb0 {
     30	timer@0 {
     31		compatible = "atmel,tcb-timer";
     32		reg = <0>;
     33	};
     34
     35	timer@1 {
     36		compatible = "atmel,tcb-timer";
     37		reg = <1>;
     38	};
     39};
     40
     41&i2c0 {
     42	status = "okay";
     43
     44	eeprom@51 {
     45		compatible = "st,24c64", "atmel,24c64";
     46		reg = <0x51>;
     47		pagesize = <32>;
     48	};
     49};
     50
     51&ebi {
     52	pinctrl-0 = <&pinctrl_ebi_nand_addr>;
     53	pinctrl-names = "default";
     54	status = "okay";
     55};
     56
     57
     58&nand_controller {
     59	status = "okay";
     60
     61	nand: nand@3 {
     62		reg = <0x3 0x0 0x2>;
     63		atmel,rb = <0>;
     64		nand-bus-width = <8>;
     65		nand-ecc-mode = "hw";
     66		nand-ecc-strength = <4>;
     67		nand-ecc-step-size = <512>;
     68		nand-on-flash-bbt;
     69		label = "atmel_nand";
     70	};
     71};