at91sam9x5_usart3.dtsi (1477B)
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * at91sam9x5_usart3.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 4 * 4 USART. 5 * 6 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> 7 */ 8 9#include <dt-bindings/pinctrl/at91.h> 10#include <dt-bindings/interrupt-controller/irq.h> 11 12/ { 13 aliases { 14 serial4 = &usart3; 15 }; 16 17 ahb { 18 apb { 19 pinctrl@fffff400 { 20 usart3 { 21 pinctrl_usart3: usart3-0 { 22 atmel,pins = 23 <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE 24 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; 25 }; 26 27 pinctrl_usart3_rts: usart3_rts-0 { 28 atmel,pins = 29 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */ 30 }; 31 32 pinctrl_usart3_cts: usart3_cts-0 { 33 atmel,pins = 34 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */ 35 }; 36 37 pinctrl_usart3_sck: usart3_sck-0 { 38 atmel,pins = 39 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */ 40 }; 41 }; 42 }; 43 44 usart3: serial@f8028000 { 45 compatible = "atmel,at91sam9260-usart"; 46 reg = <0xf8028000 0x200>; 47 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 48 pinctrl-names = "default"; 49 pinctrl-0 = <&pinctrl_usart3>; 50 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(14)>, 51 <&dma1 1 (AT91_DMA_CFG_PER_ID(15) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 52 dma-names = "tx", "rx"; 53 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 54 clock-names = "usart"; 55 status = "disabled"; 56 }; 57 }; 58 }; 59};