cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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bcm2711-rpi-4-b.dts (4215B)


      1// SPDX-License-Identifier: GPL-2.0
      2/dts-v1/;
      3#include "bcm2711.dtsi"
      4#include "bcm2711-rpi.dtsi"
      5#include "bcm283x-rpi-usb-peripheral.dtsi"
      6#include "bcm283x-rpi-wifi-bt.dtsi"
      7
      8/ {
      9	compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
     10	model = "Raspberry Pi 4 Model B";
     11
     12	chosen {
     13		/* 8250 auxiliary UART instead of pl011 */
     14		stdout-path = "serial1:115200n8";
     15	};
     16
     17	leds {
     18		led-act {
     19			gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
     20		};
     21
     22		led-pwr {
     23			label = "PWR";
     24			gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
     25			default-state = "keep";
     26			linux,default-trigger = "default-on";
     27		};
     28	};
     29
     30	sd_io_1v8_reg: sd_io_1v8_reg {
     31		compatible = "regulator-gpio";
     32		regulator-name = "vdd-sd-io";
     33		regulator-min-microvolt = <1800000>;
     34		regulator-max-microvolt = <3300000>;
     35		regulator-boot-on;
     36		regulator-always-on;
     37		regulator-settling-time-us = <5000>;
     38		gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
     39		states = <1800000 0x1>,
     40			 <3300000 0x0>;
     41		status = "okay";
     42	};
     43
     44	sd_vcc_reg: sd_vcc_reg {
     45		compatible = "regulator-fixed";
     46		regulator-name = "vcc-sd";
     47		regulator-min-microvolt = <3300000>;
     48		regulator-max-microvolt = <3300000>;
     49		regulator-boot-on;
     50		enable-active-high;
     51		gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>;
     52	};
     53};
     54
     55&bt {
     56	shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
     57};
     58
     59&ddc0 {
     60	status = "okay";
     61};
     62
     63&ddc1 {
     64	status = "okay";
     65};
     66
     67&expgpio {
     68	gpio-line-names = "BT_ON",		/*  0 */
     69			  "WL_ON",
     70			  "PWR_LED_OFF",
     71			  "GLOBAL_RESET",
     72			  "VDD_SD_IO_SEL",
     73			  "CAM_GPIO",		/*  5 */
     74			  "SD_PWR_ON",
     75			  "";
     76};
     77
     78&gpio {
     79	/*
     80	 * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
     81	 * the official GPU firmware DT blob.
     82	 *
     83	 * Legend:
     84	 * "FOO" = GPIO line named "FOO" on the schematic
     85	 * "FOO_N" = GPIO line named "FOO" on schematic, active low
     86	 */
     87	gpio-line-names = "ID_SDA",		/*  0 */
     88			  "ID_SCL",
     89			  "SDA1",
     90			  "SCL1",
     91			  "GPIO_GCLK",
     92			  "GPIO5",		/*  5 */
     93			  "GPIO6",
     94			  "SPI_CE1_N",
     95			  "SPI_CE0_N",
     96			  "SPI_MISO",
     97			  "SPI_MOSI",		/* 10 */
     98			  "SPI_SCLK",
     99			  "GPIO12",
    100			  "GPIO13",
    101			  /* Serial port */
    102			  "TXD1",
    103			  "RXD1",		/* 15 */
    104			  "GPIO16",
    105			  "GPIO17",
    106			  "GPIO18",
    107			  "GPIO19",
    108			  "GPIO20",		/* 20 */
    109			  "GPIO21",
    110			  "GPIO22",
    111			  "GPIO23",
    112			  "GPIO24",
    113			  "GPIO25",		/* 25 */
    114			  "GPIO26",
    115			  "GPIO27",
    116			  "RGMII_MDIO",
    117			  "RGMIO_MDC",
    118			  /* Used by BT module */
    119			  "CTS0",		/* 30 */
    120			  "RTS0",
    121			  "TXD0",
    122			  "RXD0",
    123			  /* Used by Wifi */
    124			  "SD1_CLK",
    125			  "SD1_CMD",		/* 35 */
    126			  "SD1_DATA0",
    127			  "SD1_DATA1",
    128			  "SD1_DATA2",
    129			  "SD1_DATA3",
    130			  /* Shared with SPI flash */
    131			  "PWM0_MISO",		/* 40 */
    132			  "PWM1_MOSI",
    133			  "STATUS_LED_G_CLK",
    134			  "SPIFLASH_CE_N",
    135			  "SDA0",
    136			  "SCL0",		/* 45 */
    137			  "RGMII_RXCLK",
    138			  "RGMII_RXCTL",
    139			  "RGMII_RXD0",
    140			  "RGMII_RXD1",
    141			  "RGMII_RXD2",		/* 50 */
    142			  "RGMII_RXD3",
    143			  "RGMII_TXCLK",
    144			  "RGMII_TXCTL",
    145			  "RGMII_TXD0",
    146			  "RGMII_TXD1",		/* 55 */
    147			  "RGMII_TXD2",
    148			  "RGMII_TXD3";
    149};
    150
    151&hdmi0 {
    152	status = "okay";
    153};
    154
    155&hdmi1 {
    156	status = "okay";
    157};
    158
    159&pixelvalve0 {
    160	status = "okay";
    161};
    162
    163&pixelvalve1 {
    164	status = "okay";
    165};
    166
    167&pixelvalve2 {
    168	status = "okay";
    169};
    170
    171&pixelvalve4 {
    172	status = "okay";
    173};
    174
    175&pwm1 {
    176	pinctrl-names = "default";
    177	pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
    178	status = "okay";
    179};
    180
    181/* EMMC2 is used to drive the SD card */
    182&emmc2 {
    183	vqmmc-supply = <&sd_io_1v8_reg>;
    184	vmmc-supply = <&sd_vcc_reg>;
    185	broken-cd;
    186	status = "okay";
    187};
    188
    189&genet {
    190	phy-handle = <&phy1>;
    191	phy-mode = "rgmii-rxid";
    192	status = "okay";
    193};
    194
    195&genet_mdio {
    196	phy1: ethernet-phy@1 {
    197		/* No PHY interrupt */
    198		reg = <0x1>;
    199	};
    200};
    201
    202&pcie0 {
    203	pci@0,0 {
    204		device_type = "pci";
    205		#address-cells = <3>;
    206		#size-cells = <2>;
    207		ranges;
    208
    209		reg = <0 0 0 0 0>;
    210
    211		usb@0,0 {
    212			reg = <0 0 0 0 0>;
    213			resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
    214		};
    215	};
    216};
    217
    218/* uart0 communicates with the BT module */
    219&uart0 {
    220	pinctrl-names = "default";
    221	pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
    222	uart-has-rtscts;
    223};
    224
    225/* uart1 is mapped to the pin header */
    226&uart1 {
    227	pinctrl-names = "default";
    228	pinctrl-0 = <&uart1_gpio14>;
    229	status = "okay";
    230};
    231
    232&vc4 {
    233	status = "okay";
    234};
    235
    236&vec {
    237	status = "disabled";
    238};
    239
    240&wifi_pwrseq {
    241	reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
    242};