cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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bcm2711-rpi-cm4.dtsi (2194B)

      1// SPDX-License-Identifier: GPL-2.0
      2/dts-v1/;
      3#include "bcm2711.dtsi"
      4#include "bcm2711-rpi.dtsi"
      5#include "bcm283x-rpi-wifi-bt.dtsi"
      6
      7/ {
      8	compatible = "raspberrypi,4-compute-module", "brcm,bcm2711";
      9
     10	chosen {
     11		/* 8250 auxiliary UART instead of pl011 */
     12		stdout-path = "serial1:115200n8";
     13	};
     14
     15	sd_io_1v8_reg: sd_io_1v8_reg {
     16		compatible = "regulator-gpio";
     17		regulator-name = "vdd-sd-io";
     18		regulator-min-microvolt = <1800000>;
     19		regulator-max-microvolt = <3300000>;
     20		regulator-boot-on;
     21		regulator-always-on;
     22		regulator-settling-time-us = <5000>;
     23		gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
     24		states = <1800000 0x1>,
     25			 <3300000 0x0>;
     26		status = "okay";
     27	};
     28
     29	sd_vcc_reg: sd_vcc_reg {
     30		compatible = "regulator-fixed";
     31		regulator-name = "vcc-sd";
     32		regulator-min-microvolt = <3300000>;
     33		regulator-max-microvolt = <3300000>;
     34		regulator-boot-on;
     35		enable-active-high;
     36		gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>;
     37	};
     38};
     39
     40&bt {
     41	shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
     42};
     43
     44/* EMMC2 is used to drive the eMMC */
     45&emmc2 {
     46	bus-width = <8>;
     47	vqmmc-supply = <&sd_io_1v8_reg>;
     48	vmmc-supply = <&sd_vcc_reg>;
     49	broken-cd;
     50	/* Even the IP block is limited to 100 MHz
     51	 * this provides a throughput gain
     52	 */
     53	mmc-hs200-1_8v;
     54	status = "okay";
     55};
     56
     57&expgpio {
     58	gpio-line-names = "BT_ON",
     59			  "WL_ON",
     60			  "PWR_LED_OFF",
     61			  "ANT1",
     62			  "VDD_SD_IO_SEL",
     63			  "CAM_GPIO",
     64			  "SD_PWR_ON",
     65			  "ANT2";
     66
     67	ant1: ant1-hog {
     68		gpio-hog;
     69		gpios = <3 GPIO_ACTIVE_HIGH>;
     70		/* internal antenna enabled */
     71		output-high;
     72		line-name = "ant1";
     73	};
     74
     75	ant2: ant2-hog {
     76		gpio-hog;
     77		gpios = <7 GPIO_ACTIVE_HIGH>;
     78		/* external antenna disabled */
     79		output-low;
     80		line-name = "ant2";
     81	};
     82};
     83
     84&genet {
     85	phy-handle = <&phy1>;
     86	phy-mode = "rgmii-rxid";
     87	status = "okay";
     88};
     89
     90&genet_mdio {
     91	phy1: ethernet-phy@0 {
     92		/* No PHY interrupt */
     93		reg = <0x0>;
     94	};
     95};
     96
     97/* uart0 communicates with the BT module */
     98&uart0 {
     99	pinctrl-names = "default";
    100	pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
    101	uart-has-rtscts;
    102};
    103
    104/* uart1 is mapped to the pin header */
    105&uart1 {
    106	pinctrl-names = "default";
    107	pinctrl-0 = <&uart1_gpio14>;
    108	status = "okay";
    109};
    110
    111&wifi_pwrseq {
    112	reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
    113};