cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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bcm2837-rpi-3-b.dts (2806B)

      1// SPDX-License-Identifier: GPL-2.0
      2/dts-v1/;
      3#include "bcm2837.dtsi"
      4#include "bcm2836-rpi.dtsi"
      5#include "bcm283x-rpi-smsc9514.dtsi"
      6#include "bcm283x-rpi-usb-host.dtsi"
      7#include "bcm283x-rpi-wifi-bt.dtsi"
      8
      9/ {
     10	compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
     11	model = "Raspberry Pi 3 Model B";
     12
     13	chosen {
     14		/* 8250 auxiliary UART instead of pl011 */
     15		stdout-path = "serial1:115200n8";
     16	};
     17
     18	memory@0 {
     19		device_type = "memory";
     20		reg = <0 0x40000000>;
     21	};
     22
     23	leds {
     24		led-act {
     25			gpios = <&expgpio 2 GPIO_ACTIVE_HIGH>;
     26		};
     27	};
     28};
     29
     30&bt {
     31	shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
     32};
     33
     34&firmware {
     35	expgpio: gpio {
     36		compatible = "raspberrypi,firmware-gpio";
     37		gpio-controller;
     38		#gpio-cells = <2>;
     39		gpio-line-names = "BT_ON",
     40				  "WL_ON",
     41				  "STATUS_LED",
     42				  "LAN_RUN",
     43				  "HDMI_HPD_N",
     44				  "CAM_GPIO0",
     45				  "CAM_GPIO1",
     46				  "PWR_LOW_N";
     47		status = "okay";
     48	};
     49};
     50
     51&gpio {
     52	/*
     53	 * Taken from rpi_SCH_3b_1p2_reduced.pdf and
     54	 * the official GPU firmware DT blob.
     55	 *
     56	 * Legend:
     57	 * "FOO" = GPIO line named "FOO" on the schematic
     58	 * "FOO_N" = GPIO line named "FOO" on schematic, active low
     59	 */
     60	gpio-line-names = "ID_SDA",
     61			  "ID_SCL",
     62			  "SDA1",
     63			  "SCL1",
     64			  "GPIO_GCLK",
     65			  "GPIO5",
     66			  "GPIO6",
     67			  "SPI_CE1_N",
     68			  "SPI_CE0_N",
     69			  "SPI_MISO",
     70			  "SPI_MOSI",
     71			  "SPI_SCLK",
     72			  "GPIO12",
     73			  "GPIO13",
     74			  /* Serial port */
     75			  "TXD1",
     76			  "RXD1",
     77			  "GPIO16",
     78			  "GPIO17",
     79			  "GPIO18",
     80			  "GPIO19",
     81			  "GPIO20",
     82			  "GPIO21",
     83			  "GPIO22",
     84			  "GPIO23",
     85			  "GPIO24",
     86			  "GPIO25",
     87			  "GPIO26",
     88			  "GPIO27",
     89			  "", /* GPIO 28 */
     90			  "LAN_RUN_BOOT",
     91			  /* Used by BT module */
     92			  "CTS0",
     93			  "RTS0",
     94			  "TXD0",
     95			  "RXD0",
     96			  /* Used by Wifi */
     97			  "SD1_CLK",
     98			  "SD1_CMD",
     99			  "SD1_DATA0",
    100			  "SD1_DATA1",
    101			  "SD1_DATA2",
    102			  "SD1_DATA3",
    103			  "PWM0_OUT",
    104			  "PWM1_OUT",
    105			  "ETH_CLK",
    106			  "WIFI_CLK",
    107			  "SDA0",
    108			  "SCL0",
    109			  "SMPS_SCL",
    110			  "SMPS_SDA",
    111			  /* Used by SD Card */
    112			  "SD_CLK_R",
    113			  "SD_CMD_R",
    114			  "SD_DATA0_R",
    115			  "SD_DATA1_R",
    116			  "SD_DATA2_R",
    117			  "SD_DATA3_R";
    118};
    119
    120&pwm {
    121	pinctrl-names = "default";
    122	pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio41>;
    123	status = "okay";
    124};
    125
    126&hdmi {
    127	hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>;
    128	power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
    129	status = "okay";
    130};
    131
    132/* uart0 communicates with the BT module */
    133&uart0 {
    134	pinctrl-names = "default";
    135	pinctrl-0 = <&uart0_gpio32 &gpclk2_gpio43>;
    136};
    137
    138/* uart1 is mapped to the pin header */
    139&uart1 {
    140	pinctrl-names = "default";
    141	pinctrl-0 = <&uart1_gpio14>;
    142	status = "okay";
    143};
    144
    145/* SDHOST is used to drive the SD card */
    146&sdhost {
    147	pinctrl-names = "default";
    148	pinctrl-0 = <&sdhost_gpio48>;
    149	status = "okay";
    150	bus-width = <4>;
    151};
    152
    153&wifi_pwrseq {
    154	reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
    155};