dm814x.dtsi (19448B)
1/* 2 * This file is licensed under the terms of the GNU General Public License 3 * version 2. This program is licensed "as is" without any warranty of any 4 * kind, whether express or implied. 5 */ 6 7#include <dt-bindings/bus/ti-sysc.h> 8#include <dt-bindings/clock/dm814.h> 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/pinctrl/dm814x.h> 11 12/ { 13 compatible = "ti,dm814"; 14 interrupt-parent = <&intc>; 15 #address-cells = <1>; 16 #size-cells = <1>; 17 chosen { }; 18 19 aliases { 20 i2c0 = &i2c1; 21 i2c1 = &i2c2; 22 serial0 = &uart1; 23 serial1 = &uart2; 24 serial2 = &uart3; 25 ethernet0 = &cpsw_emac0; 26 ethernet1 = &cpsw_emac1; 27 usb0 = &usb0; 28 usb1 = &usb1; 29 phy0 = &usb0_phy; 30 phy1 = &usb1_phy; 31 }; 32 33 cpus { 34 #address-cells = <1>; 35 #size-cells = <0>; 36 cpu@0 { 37 compatible = "arm,cortex-a8"; 38 device_type = "cpu"; 39 reg = <0>; 40 }; 41 }; 42 43 pmu { 44 compatible = "arm,cortex-a8-pmu"; 45 interrupts = <3>; 46 }; 47 48 /* 49 * The soc node represents the soc top level view. It is used for IPs 50 * that are not memory mapped in the MPU view or for the MPU itself. 51 */ 52 soc { 53 compatible = "ti,omap-infra"; 54 mpu { 55 compatible = "ti,omap3-mpu"; 56 ti,hwmods = "mpu"; 57 }; 58 }; 59 60 ocp { 61 compatible = "simple-bus"; 62 #address-cells = <1>; 63 #size-cells = <1>; 64 ranges; 65 ti,hwmods = "l3_main"; 66 67 usb: usb@47400000 { 68 compatible = "ti,am33xx-usb"; 69 reg = <0x47400000 0x1000>; 70 ranges; 71 #address-cells = <1>; 72 #size-cells = <1>; 73 ti,hwmods = "usb_otg_hs"; 74 75 usb0_phy: usb-phy@47401300 { 76 compatible = "ti,am335x-usb-phy"; 77 reg = <0x47401300 0x100>; 78 reg-names = "phy"; 79 ti,ctrl_mod = <&usb_ctrl_mod>; 80 #phy-cells = <0>; 81 }; 82 83 usb0: usb@47401000 { 84 compatible = "ti,musb-am33xx"; 85 reg = <0x47401400 0x400 86 0x47401000 0x200>; 87 reg-names = "mc", "control"; 88 89 interrupts = <18>; 90 interrupt-names = "mc"; 91 dr_mode = "otg"; 92 mentor,multipoint = <1>; 93 mentor,num-eps = <16>; 94 mentor,ram-bits = <12>; 95 mentor,power = <500>; 96 phys = <&usb0_phy>; 97 98 dmas = <&cppi41dma 0 0 &cppi41dma 1 0 99 &cppi41dma 2 0 &cppi41dma 3 0 100 &cppi41dma 4 0 &cppi41dma 5 0 101 &cppi41dma 6 0 &cppi41dma 7 0 102 &cppi41dma 8 0 &cppi41dma 9 0 103 &cppi41dma 10 0 &cppi41dma 11 0 104 &cppi41dma 12 0 &cppi41dma 13 0 105 &cppi41dma 14 0 &cppi41dma 0 1 106 &cppi41dma 1 1 &cppi41dma 2 1 107 &cppi41dma 3 1 &cppi41dma 4 1 108 &cppi41dma 5 1 &cppi41dma 6 1 109 &cppi41dma 7 1 &cppi41dma 8 1 110 &cppi41dma 9 1 &cppi41dma 10 1 111 &cppi41dma 11 1 &cppi41dma 12 1 112 &cppi41dma 13 1 &cppi41dma 14 1>; 113 dma-names = 114 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", 115 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", 116 "rx14", "rx15", 117 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", 118 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", 119 "tx14", "tx15"; 120 }; 121 122 usb1: usb@47401800 { 123 compatible = "ti,musb-am33xx"; 124 reg = <0x47401c00 0x400 125 0x47401800 0x200>; 126 reg-names = "mc", "control"; 127 interrupts = <19>; 128 interrupt-names = "mc"; 129 dr_mode = "otg"; 130 mentor,multipoint = <1>; 131 mentor,num-eps = <16>; 132 mentor,ram-bits = <12>; 133 mentor,power = <500>; 134 phys = <&usb1_phy>; 135 136 dmas = <&cppi41dma 15 0 &cppi41dma 16 0 137 &cppi41dma 17 0 &cppi41dma 18 0 138 &cppi41dma 19 0 &cppi41dma 20 0 139 &cppi41dma 21 0 &cppi41dma 22 0 140 &cppi41dma 23 0 &cppi41dma 24 0 141 &cppi41dma 25 0 &cppi41dma 26 0 142 &cppi41dma 27 0 &cppi41dma 28 0 143 &cppi41dma 29 0 &cppi41dma 15 1 144 &cppi41dma 16 1 &cppi41dma 17 1 145 &cppi41dma 18 1 &cppi41dma 19 1 146 &cppi41dma 20 1 &cppi41dma 21 1 147 &cppi41dma 22 1 &cppi41dma 23 1 148 &cppi41dma 24 1 &cppi41dma 25 1 149 &cppi41dma 26 1 &cppi41dma 27 1 150 &cppi41dma 28 1 &cppi41dma 29 1>; 151 dma-names = 152 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", 153 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", 154 "rx14", "rx15", 155 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", 156 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", 157 "tx14", "tx15"; 158 }; 159 160 cppi41dma: dma-controller@47402000 { 161 compatible = "ti,am3359-cppi41"; 162 reg = <0x47400000 0x1000 163 0x47402000 0x1000 164 0x47403000 0x1000 165 0x47404000 0x4000>; 166 reg-names = "glue", "controller", "scheduler", "queuemgr"; 167 interrupts = <17>; 168 interrupt-names = "glue"; 169 #dma-cells = <2>; 170 /* For backwards compatibility: */ 171 #dma-channels = <30>; 172 dma-channels = <30>; 173 #dma-requests = <256>; 174 dma-requests = <256>; 175 }; 176 }; 177 178 /* 179 * See TRM "Table 1-317. L4LS Instance Summary" for hints. 180 * It shows the module target agent registers though, so the 181 * actual device is typically 0x1000 before the target agent 182 * except in cases where the module is larger than 0x1000. 183 */ 184 l4ls: l4ls@48000000 { 185 compatible = "ti,dm814-l4ls", "simple-bus"; 186 #address-cells = <1>; 187 #size-cells = <1>; 188 ranges = <0 0x48000000 0x2000000>; 189 190 i2c1: i2c@28000 { 191 compatible = "ti,omap4-i2c"; 192 #address-cells = <1>; 193 #size-cells = <0>; 194 ti,hwmods = "i2c1"; 195 reg = <0x28000 0x1000>; 196 interrupts = <70>; 197 }; 198 199 elm: elm@80000 { 200 compatible = "ti,814-elm"; 201 ti,hwmods = "elm"; 202 reg = <0x80000 0x2000>; 203 interrupts = <4>; 204 }; 205 206 gpio1: gpio@32000 { 207 compatible = "ti,omap4-gpio"; 208 ti,hwmods = "gpio1"; 209 ti,gpio-always-on; 210 reg = <0x32000 0x2000>; 211 interrupts = <96>; 212 gpio-controller; 213 #gpio-cells = <2>; 214 interrupt-controller; 215 #interrupt-cells = <2>; 216 }; 217 218 gpio2: gpio@4c000 { 219 compatible = "ti,omap4-gpio"; 220 ti,hwmods = "gpio2"; 221 ti,gpio-always-on; 222 reg = <0x4c000 0x2000>; 223 interrupts = <98>; 224 gpio-controller; 225 #gpio-cells = <2>; 226 interrupt-controller; 227 #interrupt-cells = <2>; 228 }; 229 230 gpio3: gpio@1ac000 { 231 compatible = "ti,omap4-gpio"; 232 ti,hwmods = "gpio3"; 233 ti,gpio-always-on; 234 reg = <0x1ac000 0x2000>; 235 interrupts = <32>; 236 gpio-controller; 237 #gpio-cells = <2>; 238 interrupt-controller; 239 #interrupt-cells = <2>; 240 }; 241 242 gpio4: gpio@1ae000 { 243 compatible = "ti,omap4-gpio"; 244 ti,hwmods = "gpio4"; 245 ti,gpio-always-on; 246 reg = <0x1ae000 0x2000>; 247 interrupts = <62>; 248 gpio-controller; 249 #gpio-cells = <2>; 250 interrupt-controller; 251 #interrupt-cells = <2>; 252 }; 253 254 i2c2: i2c@2a000 { 255 compatible = "ti,omap4-i2c"; 256 #address-cells = <1>; 257 #size-cells = <0>; 258 ti,hwmods = "i2c2"; 259 reg = <0x2a000 0x1000>; 260 interrupts = <71>; 261 }; 262 263 mcspi1: spi@30000 { 264 compatible = "ti,omap4-mcspi"; 265 reg = <0x30000 0x1000>; 266 #address-cells = <1>; 267 #size-cells = <0>; 268 interrupts = <65>; 269 ti,spi-num-cs = <4>; 270 ti,hwmods = "mcspi1"; 271 dmas = <&edma 16 0 &edma 17 0 272 &edma 18 0 &edma 19 0 273 &edma 20 0 &edma 21 0 274 &edma 22 0 &edma 23 0>; 275 276 dma-names = "tx0", "rx0", "tx1", "rx1", 277 "tx2", "rx2", "tx3", "rx3"; 278 }; 279 280 mcspi2: spi@1a0000 { 281 compatible = "ti,omap4-mcspi"; 282 reg = <0x1a0000 0x1000>; 283 #address-cells = <1>; 284 #size-cells = <0>; 285 interrupts = <125>; 286 ti,spi-num-cs = <4>; 287 ti,hwmods = "mcspi2"; 288 dmas = <&edma 42 0 &edma 43 0 289 &edma 44 0 &edma 45 0>; 290 dma-names = "tx0", "rx0", "tx1", "rx1"; 291 }; 292 293 /* Board must configure dmas with edma_xbar for EDMA */ 294 mcspi3: spi@1a2000 { 295 compatible = "ti,omap4-mcspi"; 296 reg = <0x1a2000 0x1000>; 297 #address-cells = <1>; 298 #size-cells = <0>; 299 interrupts = <126>; 300 ti,spi-num-cs = <4>; 301 ti,hwmods = "mcspi3"; 302 }; 303 304 mcspi4: spi@1a4000 { 305 compatible = "ti,omap4-mcspi"; 306 reg = <0x1a4000 0x1000>; 307 #address-cells = <1>; 308 #size-cells = <0>; 309 interrupts = <127>; 310 ti,spi-num-cs = <4>; 311 ti,hwmods = "mcspi4"; 312 }; 313 314 timer1_target: target-module@2e000 { 315 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 316 reg = <0x2e000 0x4>, 317 <0x2e010 0x4>; 318 reg-names = "rev", "sysc"; 319 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 320 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 321 <SYSC_IDLE_NO>, 322 <SYSC_IDLE_SMART>, 323 <SYSC_IDLE_SMART_WKUP>; 324 clocks = <&timer1_fck>; 325 clock-names = "fck"; 326 #address-cells = <1>; 327 #size-cells = <1>; 328 ranges = <0x0 0x2e000 0x1000>; 329 330 timer1: timer@0 { 331 compatible = "ti,am335x-timer-1ms"; 332 reg = <0x0 0x400>; 333 interrupts = <67>; 334 ti,timer-alwon; 335 clocks = <&timer1_fck>; 336 clock-names = "fck"; 337 }; 338 }; 339 340 uart1: uart@20000 { 341 compatible = "ti,am3352-uart", "ti,omap3-uart"; 342 ti,hwmods = "uart1"; 343 reg = <0x20000 0x2000>; 344 clock-frequency = <48000000>; 345 interrupts = <72>; 346 dmas = <&edma 26 0 &edma 27 0>; 347 dma-names = "tx", "rx"; 348 }; 349 350 uart2: uart@22000 { 351 compatible = "ti,am3352-uart", "ti,omap3-uart"; 352 ti,hwmods = "uart2"; 353 reg = <0x22000 0x2000>; 354 clock-frequency = <48000000>; 355 interrupts = <73>; 356 dmas = <&edma 28 0 &edma 29 0>; 357 dma-names = "tx", "rx"; 358 }; 359 360 uart3: uart@24000 { 361 compatible = "ti,am3352-uart", "ti,omap3-uart"; 362 ti,hwmods = "uart3"; 363 reg = <0x24000 0x2000>; 364 clock-frequency = <48000000>; 365 interrupts = <74>; 366 dmas = <&edma 30 0 &edma 31 0>; 367 dma-names = "tx", "rx"; 368 }; 369 370 timer2_target: target-module@40000 { 371 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 372 reg = <0x40000 0x4>, 373 <0x40010 0x4>; 374 reg-names = "rev", "sysc"; 375 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 376 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 377 <SYSC_IDLE_NO>, 378 <SYSC_IDLE_SMART>, 379 <SYSC_IDLE_SMART_WKUP>; 380 clocks = <&timer2_fck>; 381 clock-names = "fck"; 382 #address-cells = <1>; 383 #size-cells = <1>; 384 ranges = <0x0 0x40000 0x1000>; 385 386 timer2: timer@0 { 387 compatible = "ti,dm814-timer"; 388 reg = <0 0x1000>; 389 interrupts = <68>; 390 clocks = <&timer2_fck>; 391 clock-names = "fck"; 392 }; 393 }; 394 395 timer3: timer@42000 { 396 compatible = "ti,dm814-timer"; 397 reg = <0x42000 0x2000>; 398 interrupts = <69>; 399 ti,hwmods = "timer3"; 400 }; 401 402 mmc1: mmc@60000 { 403 compatible = "ti,omap4-hsmmc"; 404 ti,hwmods = "mmc1"; 405 dmas = <&edma 24 0 406 &edma 25 0>; 407 dma-names = "tx", "rx"; 408 interrupts = <64>; 409 interrupt-parent = <&intc>; 410 reg = <0x60000 0x1000>; 411 }; 412 413 rtc: rtc@c0000 { 414 compatible = "ti,am3352-rtc", "ti,da830-rtc"; 415 reg = <0xc0000 0x1000>; 416 interrupts = <75 76>; 417 ti,hwmods = "rtc"; 418 }; 419 420 mmc2: mmc@1d8000 { 421 compatible = "ti,omap4-hsmmc"; 422 ti,hwmods = "mmc2"; 423 dmas = <&edma 2 0 424 &edma 3 0>; 425 dma-names = "tx", "rx"; 426 interrupts = <28>; 427 interrupt-parent = <&intc>; 428 reg = <0x1d8000 0x1000>; 429 }; 430 431 control: control@140000 { 432 compatible = "ti,dm814-scm", "simple-bus"; 433 reg = <0x140000 0x20000>; 434 #address-cells = <1>; 435 #size-cells = <1>; 436 ranges = <0 0x140000 0x20000>; 437 438 scm_conf: scm_conf@0 { 439 compatible = "syscon", "simple-bus"; 440 reg = <0x0 0x800>; 441 #address-cells = <1>; 442 #size-cells = <1>; 443 ranges = <0 0 0x800>; 444 445 phy_gmii_sel: phy-gmii-sel { 446 compatible = "ti,dm814-phy-gmii-sel"; 447 reg = <0x650 0x4>; 448 #phy-cells = <1>; 449 }; 450 451 scm_clocks: clocks { 452 #address-cells = <1>; 453 #size-cells = <0>; 454 }; 455 456 scm_clockdomains: clockdomains { 457 }; 458 }; 459 460 usb_ctrl_mod: control@620 { 461 compatible = "ti,am335x-usb-ctrl-module"; 462 reg = <0x620 0x10 463 0x648 0x4>; 464 reg-names = "phy_ctrl", "wakeup"; 465 }; 466 467 edma_xbar: dma-router@f90 { 468 compatible = "ti,am335x-edma-crossbar"; 469 reg = <0xf90 0x40>; 470 #dma-cells = <3>; 471 dma-requests = <32>; 472 dma-masters = <&edma>; 473 }; 474 475 /* 476 * Note that silicon revision 2.1 and older 477 * require input enabled (bit 18 set) for all 478 * 3.3V I/Os to avoid cumulative hardware damage. 479 * For more info, see errata advisory 2.1.87. 480 * We leave bit 18 out of function-mask and rely 481 * on the bootloader for it. 482 */ 483 pincntl: pinmux@800 { 484 compatible = "pinctrl-single"; 485 reg = <0x800 0x438>; 486 #address-cells = <1>; 487 #size-cells = <0>; 488 #pinctrl-cells = <1>; 489 pinctrl-single,register-width = <32>; 490 pinctrl-single,function-mask = <0x307ff>; 491 }; 492 493 usb1_phy: usb-phy@1b00 { 494 compatible = "ti,am335x-usb-phy"; 495 reg = <0x1b00 0x100>; 496 reg-names = "phy"; 497 ti,ctrl_mod = <&usb_ctrl_mod>; 498 #phy-cells = <0>; 499 }; 500 }; 501 502 prcm: prcm@180000 { 503 compatible = "ti,dm814-prcm", "simple-bus"; 504 reg = <0x180000 0x2000>; 505 #address-cells = <1>; 506 #size-cells = <1>; 507 ranges = <0 0x180000 0x2000>; 508 509 prcm_clocks: clocks { 510 #address-cells = <1>; 511 #size-cells = <0>; 512 }; 513 514 prcm_clockdomains: clockdomains { 515 }; 516 }; 517 518 /* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */ 519 pllss: pllss@1c5000 { 520 compatible = "ti,dm814-pllss", "simple-bus"; 521 reg = <0x1c5000 0x1000>; 522 #address-cells = <1>; 523 #size-cells = <1>; 524 ranges = <0 0x1c5000 0x1000>; 525 526 pllss_clocks: clocks { 527 #address-cells = <1>; 528 #size-cells = <0>; 529 }; 530 531 pllss_clockdomains: clockdomains { 532 }; 533 }; 534 535 wdt1: wdt@1c7000 { 536 compatible = "ti,omap3-wdt"; 537 ti,hwmods = "wd_timer"; 538 reg = <0x1c7000 0x1000>; 539 interrupts = <91>; 540 }; 541 }; 542 543 intc: interrupt-controller@48200000 { 544 compatible = "ti,dm814-intc"; 545 interrupt-controller; 546 #interrupt-cells = <1>; 547 reg = <0x48200000 0x1000>; 548 }; 549 550 /* Board must configure evtmux with edma_xbar for EDMA */ 551 mmc3: mmc@47810000 { 552 compatible = "ti,omap4-hsmmc"; 553 ti,hwmods = "mmc3"; 554 interrupts = <29>; 555 interrupt-parent = <&intc>; 556 reg = <0x47810000 0x1000>; 557 }; 558 559 target-module@49000000 { 560 compatible = "ti,sysc-omap4", "ti,sysc"; 561 reg = <0x49000000 0x4>; 562 reg-names = "rev"; 563 clocks = <&alwon_clkctrl DM814_TPCC_CLKCTRL 0>; 564 clock-names = "fck"; 565 #address-cells = <1>; 566 #size-cells = <1>; 567 ranges = <0x0 0x49000000 0x10000>; 568 569 edma: dma@0 { 570 compatible = "ti,edma3-tpcc"; 571 reg = <0 0x10000>; 572 reg-names = "edma3_cc"; 573 interrupts = <12 13 14>; 574 interrupt-names = "edma3_ccint", "edma3_mperr", 575 "edma3_ccerrint"; 576 dma-requests = <64>; 577 #dma-cells = <2>; 578 579 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>, 580 <&edma_tptc2 3>, <&edma_tptc3 0>; 581 582 ti,edma-memcpy-channels = <20 21>; 583 }; 584 }; 585 586 target-module@49800000 { 587 compatible = "ti,sysc-omap4", "ti,sysc"; 588 reg = <0x49800000 0x4>, 589 <0x49800010 0x4>; 590 reg-names = "rev", "sysc"; 591 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 592 ti,sysc-midle = <SYSC_IDLE_FORCE>; 593 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 594 <SYSC_IDLE_SMART>; 595 clocks = <&alwon_clkctrl DM814_TPTC0_CLKCTRL 0>; 596 clock-names = "fck"; 597 #address-cells = <1>; 598 #size-cells = <1>; 599 ranges = <0x0 0x49800000 0x100000>; 600 601 edma_tptc0: dma@0 { 602 compatible = "ti,edma3-tptc"; 603 reg = <0 0x100000>; 604 interrupts = <112>; 605 interrupt-names = "edma3_tcerrint"; 606 }; 607 }; 608 609 target-module@49900000 { 610 compatible = "ti,sysc-omap4", "ti,sysc"; 611 reg = <0x49900000 0x4>, 612 <0x49900010 0x4>; 613 reg-names = "rev", "sysc"; 614 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 615 ti,sysc-midle = <SYSC_IDLE_FORCE>; 616 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 617 <SYSC_IDLE_SMART>; 618 clocks = <&alwon_clkctrl DM814_TPTC1_CLKCTRL 0>; 619 clock-names = "fck"; 620 #address-cells = <1>; 621 #size-cells = <1>; 622 ranges = <0x0 0x49900000 0x100000>; 623 624 edma_tptc1: dma@0 { 625 compatible = "ti,edma3-tptc"; 626 reg = <0 0x100000>; 627 interrupts = <113>; 628 interrupt-names = "edma3_tcerrint"; 629 }; 630 }; 631 632 target-module@49a00000 { 633 compatible = "ti,sysc-omap4", "ti,sysc"; 634 reg = <0x49a00000 0x4>, 635 <0x49a00010 0x4>; 636 reg-names = "rev", "sysc"; 637 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 638 ti,sysc-midle = <SYSC_IDLE_FORCE>; 639 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 640 <SYSC_IDLE_SMART>; 641 clocks = <&alwon_clkctrl DM814_TPTC2_CLKCTRL 0>; 642 clock-names = "fck"; 643 #address-cells = <1>; 644 #size-cells = <1>; 645 ranges = <0x0 0x49a00000 0x100000>; 646 647 edma_tptc2: dma@0 { 648 compatible = "ti,edma3-tptc"; 649 reg = <0 0x100000>; 650 interrupts = <114>; 651 interrupt-names = "edma3_tcerrint"; 652 }; 653 }; 654 655 target-module@49b00000 { 656 compatible = "ti,sysc-omap4", "ti,sysc"; 657 reg = <0x49b00000 0x4>, 658 <0x49b00010 0x4>; 659 reg-names = "rev", "sysc"; 660 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 661 ti,sysc-midle = <SYSC_IDLE_FORCE>; 662 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 663 <SYSC_IDLE_SMART>; 664 clocks = <&alwon_clkctrl DM814_TPTC3_CLKCTRL 0>; 665 clock-names = "fck"; 666 #address-cells = <1>; 667 #size-cells = <1>; 668 ranges = <0x0 0x49b00000 0x100000>; 669 670 edma_tptc3: dma@0 { 671 compatible = "ti,edma3-tptc"; 672 reg = <0 0x100000>; 673 interrupts = <115>; 674 interrupt-names = "edma3_tcerrint"; 675 }; 676 }; 677 678 /* See TRM "Table 1-318. L4HS Instance Summary" */ 679 l4hs: l4hs@4a000000 { 680 compatible = "ti,dm814-l4hs", "simple-bus"; 681 #address-cells = <1>; 682 #size-cells = <1>; 683 ranges = <0 0x4a000000 0x1b4040>; 684 685 target-module@100000 { 686 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 687 reg = <0x100900 0x4>, 688 <0x100908 0x4>, 689 <0x100904 0x4>; 690 reg-names = "rev", "sysc", "syss"; 691 ti,sysc-mask = <0>; 692 ti,sysc-midle = <SYSC_IDLE_FORCE>, 693 <SYSC_IDLE_NO>; 694 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 695 <SYSC_IDLE_NO>; 696 ti,syss-mask = <1>; 697 clocks = <&alwon_ethernet_clkctrl DM814_ETHERNET_CPGMAC0_CLKCTRL 0>; 698 clock-names = "fck"; 699 #address-cells = <1>; 700 #size-cells = <1>; 701 ranges = <0 0x100000 0x8000>; 702 703 mac: ethernet@0 { 704 compatible = "ti,cpsw"; 705 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; 706 clock-names = "fck", "cpts"; 707 cpdma_channels = <8>; 708 ale_entries = <1024>; 709 bd_ram_size = <0x2000>; 710 mac_control = <0x20>; 711 slaves = <2>; 712 active_slave = <0>; 713 cpts_clock_mult = <0x80000000>; 714 cpts_clock_shift = <29>; 715 reg = <0 0x800>, 716 <0x900 0x100>; 717 #address-cells = <1>; 718 #size-cells = <1>; 719 /* 720 * c0_rx_thresh_pend 721 * c0_rx_pend 722 * c0_tx_pend 723 * c0_misc_pend 724 */ 725 interrupts = <40 41 42 43>; 726 ranges = <0 0 0x8000>; 727 syscon = <&scm_conf>; 728 729 davinci_mdio: mdio@800 { 730 compatible = "ti,cpsw-mdio", "ti,davinci_mdio"; 731 clocks = <&cpsw_125mhz_gclk>; 732 clock-names = "fck"; 733 #address-cells = <1>; 734 #size-cells = <0>; 735 bus_freq = <1000000>; 736 reg = <0x800 0x100>; 737 }; 738 739 cpsw_emac0: slave@200 { 740 /* Filled in by U-Boot */ 741 mac-address = [ 00 00 00 00 00 00 ]; 742 phys = <&phy_gmii_sel 1>; 743 }; 744 745 cpsw_emac1: slave@300 { 746 /* Filled in by U-Boot */ 747 mac-address = [ 00 00 00 00 00 00 ]; 748 phys = <&phy_gmii_sel 2>; 749 }; 750 }; 751 }; 752 }; 753 754 gpmc: gpmc@50000000 { 755 compatible = "ti,am3352-gpmc"; 756 ti,hwmods = "gpmc"; 757 ti,no-idle-on-init; 758 reg = <0x50000000 0x2000>; 759 interrupts = <100>; 760 gpmc,num-cs = <7>; 761 gpmc,num-waitpins = <2>; 762 #address-cells = <2>; 763 #size-cells = <1>; 764 interrupt-controller; 765 #interrupt-cells = <2>; 766 gpio-controller; 767 #gpio-cells = <2>; 768 }; 769 }; 770}; 771 772#include "dm814x-clocks.dtsi" 773 774/* Preferred always-on timer for clocksource */ 775&timer1_target { 776 ti,no-reset-on-init; 777 ti,no-idle; 778 timer@0 { 779 assigned-clocks = <&timer1_fck>; 780 assigned-clock-parents = <&devosc_ck>; 781 }; 782}; 783 784/* Preferred timer for clockevent */ 785&timer2_target { 786 ti,no-reset-on-init; 787 ti,no-idle; 788 timer@0 { 789 assigned-clocks = <&timer2_fck>; 790 assigned-clock-parents = <&devosc_ck>; 791 }; 792};