cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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dra62x-j5eco-evm.dts (3277B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/dts-v1/;
      3
      4#include "dra62x.dtsi"
      5#include <dt-bindings/interrupt-controller/irq.h>
      6
      7/ {
      8	model = "DRA62x J5 Eco EVM";
      9	compatible = "ti,dra62x-j5eco-evm", "ti,dra62x", "ti,dm8148", "ti,dm814";
     10
     11	memory@80000000 {
     12		device_type = "memory";
     13		reg = <0x80000000 0x40000000>;	/* 1 GB */
     14	};
     15
     16	/* MIC94060YC6 controlled by SD1_POW pin */
     17	vmmcsd_fixed: fixedregulator0 {
     18		compatible = "regulator-fixed";
     19		regulator-name = "vmmcsd_fixed";
     20		regulator-min-microvolt = <3300000>;
     21		regulator-max-microvolt = <3300000>;
     22	};
     23};
     24
     25&cpsw_emac0 {
     26	phy-handle = <&ethphy0>;
     27	phy-mode = "rgmii-id";
     28};
     29
     30&cpsw_emac1 {
     31	phy-handle = <&ethphy1>;
     32	phy-mode = "rgmii-id";
     33};
     34
     35&davinci_mdio {
     36	ethphy0: ethernet-phy@0 {
     37		reg = <0>;
     38	};
     39
     40	ethphy1: ethernet-phy@1 {
     41		reg = <1>;
     42	};
     43};
     44
     45&gpmc {
     46	ranges = <0 0 0x04000000 0x01000000>;	/* CS0: 16MB for NAND */
     47
     48	nand@0,0 {
     49		compatible = "ti,omap2-nand";
     50		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
     51		interrupt-parent = <&gpmc>;
     52		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
     53			     <1 IRQ_TYPE_NONE>; /* termcount */
     54		linux,mtd-name= "micron,mt29f2g16aadwp";
     55		#address-cells = <1>;
     56		#size-cells = <1>;
     57		ti,nand-ecc-opt = "bch8";
     58		nand-bus-width = <16>;
     59		gpmc,device-width = <2>;
     60		gpmc,sync-clk-ps = <0>;
     61		gpmc,cs-on-ns = <0>;
     62		gpmc,cs-rd-off-ns = <44>;
     63		gpmc,cs-wr-off-ns = <44>;
     64		gpmc,adv-on-ns = <6>;
     65		gpmc,adv-rd-off-ns = <34>;
     66		gpmc,adv-wr-off-ns = <44>;
     67		gpmc,we-on-ns = <0>;
     68		gpmc,we-off-ns = <40>;
     69		gpmc,oe-on-ns = <0>;
     70		gpmc,oe-off-ns = <54>;
     71		gpmc,access-ns = <64>;
     72		gpmc,rd-cycle-ns = <82>;
     73		gpmc,wr-cycle-ns = <82>;
     74		gpmc,bus-turnaround-ns = <0>;
     75		gpmc,cycle2cycle-delay-ns = <0>;
     76		gpmc,clk-activation-ns = <0>;
     77		gpmc,wr-access-ns = <40>;
     78		gpmc,wr-data-mux-bus-ns = <0>;
     79		partition@0 {
     80			label = "X-Loader";
     81			reg = <0 0x80000>;
     82		};
     83		partition@80000 {
     84			label = "U-Boot";
     85			reg = <0x80000 0x1c0000>;
     86		};
     87		partition@1c0000 {
     88			label = "Environment";
     89			reg = <0x240000 0x40000>;
     90		};
     91		partition@280000 {
     92			label = "Kernel";
     93			reg = <0x280000 0x500000>;
     94		};
     95		partition@780000 {
     96			label = "Filesystem";
     97			reg = <0x780000 0xf880000>;
     98		};
     99	};
    100};
    101
    102&mmc2 {
    103	pinctrl-names = "default";
    104	pinctrl-0 = <&sd1_pins>;
    105	vmmc-supply = <&vmmcsd_fixed>;
    106	bus-width = <4>;
    107	cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
    108};
    109
    110&pincntl {
    111	sd1_pins: pinmux_sd1_pins {
    112		pinctrl-single,pins = <
    113			DM814X_IOPAD(0x0800, PIN_INPUT | 0x1)	/* SD1_CLK */
    114			DM814X_IOPAD(0x0804, PIN_INPUT_PULLUP |  0x1)	/* SD1_CMD */
    115			DM814X_IOPAD(0x0808, PIN_INPUT_PULLUP |  0x1)	/* SD1_DAT[0] */
    116			DM814X_IOPAD(0x080c, PIN_INPUT_PULLUP |  0x1)	/* SD1_DAT[1] */
    117			DM814X_IOPAD(0x0810, PIN_INPUT_PULLUP |  0x1)	/* SD1_DAT[2] */
    118			DM814X_IOPAD(0x0814, PIN_INPUT_PULLUP |  0x1)	/* SD1_DAT[3] */
    119			DM814X_IOPAD(0x0924, PIN_OUTPUT |  0x40)	/* SD1_POW */
    120			DM814X_IOPAD(0x093C, PIN_INPUT_PULLUP |  0x80)	/* GP1[6] */
    121			>;
    122	};
    123
    124	usb0_pins: pinmux_usb0_pins {
    125		pinctrl-single,pins = <
    126			DM814X_IOPAD(0x0c34, PIN_OUTPUT | 0x1)	/* USB0_DRVVBUS */
    127			>;
    128	};
    129};
    130
    131/* USB0_ID pin state: SW10[1] = 0 cable detection, SW10[1] = 1 ID grounded */
    132&usb0 {
    133	pinctrl-names = "default";
    134	pinctrl-0 = <&usb0_pins>;
    135	dr_mode = "otg";
    136};
    137
    138&usb1_phy {
    139	status = "disabled";
    140};
    141
    142&usb1 {
    143	status = "disabled";
    144};