cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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dra72-evm-tps65917.dtsi (3240B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
      4 */
      5
      6/*
      7 * Integrated Power Management Chip
      8 * https://www.ti.com/lit/ds/symlink/tps65917-q1.pdf
      9 */
     10
     11&tps65917 {
     12	compatible = "ti,tps65917";
     13
     14	interrupt-controller;
     15	#interrupt-cells = <2>;
     16
     17	ti,system-power-controller;
     18
     19	tps65917_pmic {
     20		compatible = "ti,tps65917-pmic";
     21
     22		smps1-in-supply = <&vsys_3v3>;
     23		smps2-in-supply = <&vsys_3v3>;
     24		smps3-in-supply = <&vsys_3v3>;
     25		smps4-in-supply = <&vsys_3v3>;
     26		smps5-in-supply = <&vsys_3v3>;
     27		ldo1-in-supply = <&vsys_3v3>;
     28		ldo2-in-supply = <&vsys_3v3>;
     29		ldo3-in-supply = <&vsys_3v3>;
     30		ldo4-in-supply = <&evm_5v0>;
     31		ldo5-in-supply = <&vsys_3v3>;
     32
     33		tps65917_regulators: regulators {
     34			smps1_reg: smps1 {
     35				/* VDD_MPU */
     36				regulator-name = "smps1";
     37				regulator-min-microvolt = <850000>;
     38				regulator-max-microvolt = <1250000>;
     39				regulator-always-on;
     40				regulator-boot-on;
     41			};
     42
     43			smps2_reg: smps2 {
     44				/* VDD_CORE */
     45				regulator-name = "smps2";
     46				regulator-min-microvolt = <850000>;
     47				regulator-max-microvolt = <1150000>;
     48				regulator-boot-on;
     49				regulator-always-on;
     50			};
     51
     52			smps3_reg: smps3 {
     53				/* VDD_GPU IVA DSPEVE */
     54				regulator-name = "smps3";
     55				regulator-min-microvolt = <850000>;
     56				regulator-max-microvolt = <1250000>;
     57				regulator-boot-on;
     58				regulator-always-on;
     59			};
     60
     61			smps4_reg: smps4 {
     62				/* VDDS1V8 */
     63				regulator-name = "smps4";
     64				regulator-min-microvolt = <1800000>;
     65				regulator-max-microvolt = <1800000>;
     66				regulator-always-on;
     67				regulator-boot-on;
     68			};
     69
     70			smps5_reg: smps5 {
     71				/* VDD_DDR */
     72				regulator-name = "smps5";
     73				regulator-min-microvolt = <1350000>;
     74				regulator-max-microvolt = <1350000>;
     75				regulator-boot-on;
     76				regulator-always-on;
     77			};
     78
     79			ldo1_reg: ldo1 {
     80				/* LDO1_OUT --> SDIO  */
     81				regulator-name = "ldo1";
     82				regulator-min-microvolt = <1800000>;
     83				regulator-max-microvolt = <3300000>;
     84				regulator-always-on;
     85				regulator-boot-on;
     86				regulator-allow-bypass;
     87			};
     88
     89			ldo2_reg: ldo2 {
     90				regulator-name = "ldo2";
     91				regulator-min-microvolt = <1800000>;
     92				regulator-max-microvolt = <1800000>;
     93				regulator-allow-bypass;
     94			};
     95
     96			ldo3_reg: ldo3 {
     97				/* VDDA_1V8_PHY */
     98				regulator-name = "ldo3";
     99				regulator-min-microvolt = <1800000>;
    100				regulator-max-microvolt = <1800000>;
    101				regulator-boot-on;
    102				regulator-always-on;
    103			};
    104
    105			ldo5_reg: ldo5 {
    106				/* VDDA_1V8_PLL */
    107				regulator-name = "ldo5";
    108				regulator-min-microvolt = <1800000>;
    109				regulator-max-microvolt = <1800000>;
    110				regulator-always-on;
    111				regulator-boot-on;
    112			};
    113
    114			ldo4_reg: ldo4 {
    115				/* VDDA_3V_USB: VDDA_USBHS33 */
    116				regulator-name = "ldo4";
    117				regulator-min-microvolt = <3300000>;
    118				regulator-max-microvolt = <3300000>;
    119				regulator-boot-on;
    120			};
    121		};
    122	};
    123
    124	tps65917_power_button {
    125		compatible = "ti,palmas-pwrbutton";
    126		interrupt-parent = <&tps65917>;
    127		interrupts = <1 IRQ_TYPE_NONE>;
    128		wakeup-source;
    129		ti,palmas-long-press-seconds = <6>;
    130	};
    131};
    132
    133&usb2_phy1 {
    134	phy-supply = <&ldo4_reg>;
    135};
    136
    137&usb2_phy2 {
    138	phy-supply = <&ldo4_reg>;
    139};
    140
    141&dss {
    142	vdda_video-supply = <&ldo5_reg>;
    143};
    144
    145&mmc1 {
    146	vqmmc-supply = <&ldo1_reg>;
    147};
    148
    149&cpu0 {
    150	vdd-supply = <&smps1_reg>;
    151};