cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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exynos4412-itop-elite.dts (4752B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * TOPEET's Exynos4412 based itop board device tree source
      4 *
      5 * Copyright (c) 2016 SUMOMO Computer Association
      6 *			https://www.sumomo.mobi
      7 *			Randy Li <ayaka@soulik.info>
      8 *
      9 * Device tree source file for TOPEET iTop Exynos 4412 core board
     10 * which is based on Samsung's Exynos4412 SoC.
     11 */
     12
     13/dts-v1/;
     14#include <dt-bindings/pwm/pwm.h>
     15#include <dt-bindings/sound/samsung-i2s.h>
     16#include "exynos4412-itop-scp-core.dtsi"
     17
     18/ {
     19	model = "TOPEET iTop 4412 Elite board based on Exynos4412";
     20	compatible = "topeet,itop4412-elite", "samsung,exynos4412", "samsung,exynos4";
     21
     22	chosen {
     23		bootargs = "root=/dev/mmcblk0p2 rw rootfstype=ext4 rootdelay=1 rootwait";
     24		stdout-path = "serial2:115200n8";
     25	};
     26
     27	leds {
     28		compatible = "gpio-leds";
     29
     30		led2 {
     31			label = "red:system";
     32			gpios = <&gpx1 0 GPIO_ACTIVE_HIGH>;
     33			default-state = "off";
     34			linux,default-trigger = "heartbeat";
     35		};
     36
     37		led3 {
     38			label = "red:user";
     39			gpios = <&gpk1 1 GPIO_ACTIVE_HIGH>;
     40			default-state = "off";
     41		};
     42	};
     43
     44	gpio-keys {
     45		compatible = "gpio-keys";
     46
     47		home {
     48			label = "GPIO Key Home";
     49			linux,code = <KEY_HOME>;
     50			gpios = <&gpx1 1 GPIO_ACTIVE_LOW>;
     51		};
     52
     53		back {
     54			label = "GPIO Key Back";
     55			linux,code = <KEY_BACK>;
     56			gpios = <&gpx1 2 GPIO_ACTIVE_LOW>;
     57		};
     58
     59		sleep {
     60			label = "GPIO Key Sleep";
     61			linux,code = <KEY_POWER>;
     62			gpios = <&gpx3 3 GPIO_ACTIVE_LOW>;
     63		};
     64
     65		vol-up {
     66			label = "GPIO Key Vol+";
     67			linux,code = <KEY_UP>;
     68			gpios = <&gpx2 1 GPIO_ACTIVE_LOW>;
     69		};
     70
     71		vol-down {
     72			label = "GPIO Key Vol-";
     73			linux,code = <KEY_DOWN>;
     74			gpios = <&gpx2 0 GPIO_ACTIVE_LOW>;
     75		};
     76	};
     77
     78	sound {
     79		compatible = "simple-audio-card";
     80		simple-audio-card,name = "wm-sound";
     81
     82		simple-audio-card,format = "i2s";
     83		simple-audio-card,bitclock-master = <&link0_codec>;
     84		simple-audio-card,frame-master = <&link0_codec>;
     85
     86		simple-audio-card,widgets =
     87			"Microphone", "Mic Jack",
     88			"Line", "Line In",
     89			"Line", "Line Out",
     90			"Speaker", "Speaker",
     91			"Headphone", "Headphone Jack";
     92		simple-audio-card,routing =
     93			"Headphone Jack", "HP_L",
     94			"Headphone Jack", "HP_R",
     95			"Speaker", "SPK_LP",
     96			"Speaker", "SPK_LN",
     97			"Speaker", "SPK_RP",
     98			"Speaker", "SPK_RN",
     99			"LINPUT1", "Mic Jack",
    100			"LINPUT3", "Mic Jack",
    101			"RINPUT1", "Mic Jack",
    102			"RINPUT2", "Mic Jack";
    103
    104		simple-audio-card,cpu {
    105			sound-dai = <&i2s0 0>;
    106		};
    107
    108		link0_codec: simple-audio-card,codec {
    109			sound-dai = <&codec>;
    110			clocks = <&i2s0 CLK_I2S_CDCLK>;
    111			system-clock-frequency = <11289600>;
    112		};
    113	};
    114
    115	beep {
    116		compatible = "pwm-beeper";
    117		pwms = <&pwm 0 4000000 PWM_POLARITY_INVERTED>;
    118	};
    119};
    120
    121&adc {
    122	vdd-supply = <&ldo3_reg>;
    123	status = "okay";
    124};
    125
    126&camera {
    127	pinctrl-0 = <&cam_port_a_clk_active>;
    128	pinctrl-names = "default";
    129	status = "okay";
    130	assigned-clocks = <&clock CLK_MOUT_CAM0>;
    131	assigned-clock-parents = <&clock CLK_XUSBXTI>;
    132};
    133
    134&clock_audss {
    135	assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
    136			<&clock_audss EXYNOS_MOUT_I2S>,
    137			<&clock_audss EXYNOS_DOUT_SRP>,
    138			<&clock_audss EXYNOS_DOUT_AUD_BUS>;
    139	assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
    140			<&clock_audss EXYNOS_MOUT_AUDSS>;
    141	assigned-clock-rates = <0>, <0>, <112896000>, <11289600>;
    142};
    143
    144&ehci {
    145	status = "okay";
    146	/* In order to reset USB ethernet */
    147	samsung,vbus-gpio = <&gpc0 1 GPIO_ACTIVE_HIGH>;
    148
    149	phys = <&exynos_usbphy 1>, <&exynos_usbphy 3>;
    150	phy-names = "host", "hsic1";
    151};
    152
    153&exynos_usbphy {
    154	status = "okay";
    155};
    156
    157&fimc_0 {
    158	status = "okay";
    159	assigned-clocks = <&clock CLK_MOUT_FIMC0>,
    160			<&clock CLK_SCLK_FIMC0>;
    161	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
    162	assigned-clock-rates = <0>, <176000000>;
    163};
    164
    165&hsotg {
    166	dr_mode = "peripheral";
    167	status = "okay";
    168};
    169
    170&i2c_4 {
    171	samsung,i2c-sda-delay = <100>;
    172	samsung,i2c-slave-addr = <0x10>;
    173	samsung,i2c-max-bus-freq = <100000>;
    174	pinctrl-0 = <&i2c4_bus>;
    175	pinctrl-names = "default";
    176	status = "okay";
    177
    178	codec: audio-codec@1a {
    179		compatible = "wlf,wm8960";
    180		reg = <0x1a>;
    181		clocks = <&pmu_system_controller 0>;
    182		clock-names = "MCLK1";
    183		wlf,shared-lrclk;
    184		#sound-dai-cells = <0>;
    185	};
    186};
    187
    188&i2s0 {
    189	pinctrl-0 = <&i2s0_bus>;
    190	pinctrl-names = "default";
    191	status = "okay";
    192};
    193
    194&pinctrl_1 {
    195	ether-reset-pins {
    196		samsung,pins = "gpc0-1";
    197		samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
    198		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
    199		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
    200	};
    201};
    202
    203&pwm {
    204	status = "okay";
    205	pinctrl-0 = <&pwm0_out>;
    206	pinctrl-names = "default";
    207	samsung,pwm-outputs = <0>;
    208};
    209
    210&sdhci_2 {
    211	bus-width = <4>;
    212	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
    213	pinctrl-names = "default";
    214	cd-gpio = <&gpx0 7 GPIO_ACTIVE_LOW>;
    215	cap-sd-highspeed;
    216	vmmc-supply = <&ldo23_reg>;
    217	vqmmc-supply = <&ldo17_reg>;
    218	status = "okay";
    219};
    220
    221&serial_1 {
    222	status = "okay";
    223};
    224
    225&serial_2 {
    226	status = "okay";
    227};