cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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exynos4412-odroidu3.dts (3076B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Hardkernel's Exynos4412 based ODROID-U3 board device tree source
      4 *
      5 * Copyright (c) 2014 Marek Szyprowski <m.szyprowski@samsung.com>
      6 *
      7 * Device tree source file for Hardkernel's ODROID-U3 board which is based
      8 * on Samsung's Exynos4412 SoC.
      9 */
     10
     11/dts-v1/;
     12#include "exynos4412-odroid-common.dtsi"
     13#include "exynos4412-prime.dtsi"
     14
     15/ {
     16	model = "Hardkernel ODROID-U3 board based on Exynos4412";
     17	compatible = "hardkernel,odroid-u3", "samsung,exynos4412", "samsung,exynos4";
     18
     19	aliases {
     20		ethernet = &ethernet;
     21	};
     22
     23	memory@40000000 {
     24		device_type = "memory";
     25		reg = <0x40000000 0x7FF00000>;
     26	};
     27
     28	vbus_otg_reg: regulator-1 {
     29		compatible = "regulator-fixed";
     30		regulator-name = "VBUS_VDD_5.0V";
     31		regulator-min-microvolt = <5000000>;
     32		regulator-max-microvolt = <5000000>;
     33		gpio = <&gpl2 0 GPIO_ACTIVE_HIGH>;
     34		enable-active-high;
     35	};
     36
     37	leds {
     38		compatible = "gpio-leds";
     39		led1 {
     40			label = "led1:heart";
     41			gpios = <&gpc1 0 GPIO_ACTIVE_LOW>;
     42			default-state = "on";
     43			linux,default-trigger = "heartbeat";
     44		};
     45	};
     46
     47	fan0: pwm-fan {
     48		compatible = "pwm-fan";
     49		pwms = <&pwm 0 10000 0>;
     50		#cooling-cells = <2>;
     51		cooling-levels = <0 102 170 230>;
     52	};
     53};
     54
     55&adc {
     56	vdd-supply = <&ldo10_reg>;
     57	/* Nothing connected to ADC inputs, keep it disabled */
     58};
     59
     60/* Supply for LAN9730/SMSC95xx */
     61&buck8_reg {
     62	regulator-name = "BUCK8_P3V3";
     63	regulator-min-microvolt = <3300000>;
     64	regulator-max-microvolt = <3300000>;
     65};
     66
     67&cpu_thermal {
     68	cooling-maps {
     69		map0 {
     70			trip = <&cpu_alert1>;
     71			cooling-device = <&cpu0 9 9>, <&cpu1 9 9>,
     72					 <&cpu2 9 9>, <&cpu3 9 9>,
     73					 <&fan0 1 2>;
     74		};
     75		map1 {
     76			trip = <&cpu_alert2>;
     77			cooling-device = <&cpu0 15 15>, <&cpu1 15 15>,
     78					 <&cpu2 15 15>, <&cpu3 15 15>,
     79					 <&fan0 2 3>;
     80		};
     81		map2 {
     82			trip = <&cpu_alert0>;
     83			cooling-device = <&fan0 0 1>;
     84		};
     85	};
     86};
     87
     88&hdmicec {
     89	needs-hpd;
     90};
     91
     92/* VDDQ for MSHC (eMMC card) */
     93&ldo22_reg {
     94	regulator-name = "LDO22_VDDQ_MMC4_2.8V";
     95	regulator-min-microvolt = <2800000>;
     96	regulator-max-microvolt = <2800000>;
     97};
     98
     99&mshc_0 {
    100	vqmmc-supply = <&ldo22_reg>;
    101};
    102
    103&pwm {
    104	pinctrl-0 = <&pwm0_out>;
    105	pinctrl-names = "default";
    106	samsung,pwm-outputs = <0>;
    107	status = "okay";
    108};
    109
    110&usb3503 {
    111	clock-names = "refclk";
    112	clocks = <&pmu_system_controller 0>;
    113	refclk-frequency = <24000000>;
    114};
    115
    116&ehci {
    117	#address-cells = <1>;
    118	#size-cells = <0>;
    119	phys = <&exynos_usbphy 2>, <&exynos_usbphy 3>;
    120	phy-names = "hsic0", "hsic1";
    121
    122	ethernet: ethernet@2 {
    123		compatible = "usb424,9730";
    124		reg = <2>;
    125		local-mac-address = [00 00 00 00 00 00]; /* Filled in by a bootloader */
    126	};
    127};
    128
    129&hsotg {
    130	dr_mode = "otg";
    131	vbus-supply = <&vbus_otg_reg>;
    132};
    133
    134&sound {
    135	model = "Odroid-U3";
    136	samsung,audio-widgets =
    137		"Headphone", "Headphone Jack",
    138		"Speakers", "Speakers";
    139	samsung,audio-routing =
    140		"Headphone Jack", "HPL",
    141		"Headphone Jack", "HPR",
    142		"Headphone Jack", "MICBIAS",
    143		"IN1", "Headphone Jack",
    144		"Speakers", "SPKL",
    145		"Speakers", "SPKR";
    146};
    147
    148&spi_1 {
    149	pinctrl-names = "default";
    150	pinctrl-0 = <&spi1_bus>;
    151	cs-gpios = <&gpb 5 GPIO_ACTIVE_HIGH>;
    152	status = "okay";
    153};