cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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imx23-olinuxino.dts (2641B)

      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * Copyright 2012 Freescale Semiconductor, Inc.
      4 *
      5 * Author: Fabio Estevam <fabio.estevam@freescale.com>
      6 */
      7
      8/dts-v1/;
      9#include <dt-bindings/gpio/gpio.h>
     10#include "imx23.dtsi"
     11
     12/ {
     13	model = "i.MX23 Olinuxino Low Cost Board";
     14	compatible = "olimex,imx23-olinuxino", "fsl,imx23";
     15
     16	memory@40000000 {
     17		device_type = "memory";
     18		reg = <0x40000000 0x04000000>;
     19	};
     20
     21	apb@80000000 {
     22		apbh@80000000 {
     23			ssp0: spi@80010000 {
     24				compatible = "fsl,imx23-mmc";
     25				pinctrl-names = "default";
     26				pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_sck_cfg>;
     27				bus-width = <4>;
     28				broken-cd;
     29				status = "okay";
     30			};
     31
     32			pinctrl@80018000 {
     33				pinctrl-names = "default";
     34				pinctrl-0 = <&hog_pins_a>;
     35
     36				hog_pins_a: hog@0 {
     37					reg = <0>;
     38					fsl,pinmux-ids = <
     39						MX23_PAD_GPMI_ALE__GPIO_0_17
     40					>;
     41					fsl,drive-strength = <MXS_DRIVE_4mA>;
     42					fsl,voltage = <MXS_VOLTAGE_HIGH>;
     43					fsl,pull-up = <MXS_PULL_DISABLE>;
     44				};
     45
     46				led_pin_gpio2_1: led_gpio2_1@0 {
     47					reg = <0>;
     48					fsl,pinmux-ids = <
     49						MX23_PAD_SSP1_DETECT__GPIO_2_1
     50					>;
     51					fsl,drive-strength = <MXS_DRIVE_4mA>;
     52					fsl,voltage = <MXS_VOLTAGE_HIGH>;
     53					fsl,pull-up = <MXS_PULL_DISABLE>;
     54				};
     55			};
     56
     57			ssp1: spi@80034000 {
     58				#address-cells = <1>;
     59				#size-cells = <0>;
     60				compatible = "fsl,imx23-spi";
     61				pinctrl-names = "default";
     62				pinctrl-0 = <&spi2_pins_a>;
     63				status = "okay";
     64			};
     65		};
     66
     67		apbx@80040000 {
     68			lradc@80050000 {
     69				status = "okay";
     70			};
     71
     72			i2c: i2c@80058000 {
     73				pinctrl-names = "default";
     74				pinctrl-0 = <&i2c_pins_b>;
     75				status = "okay";
     76			};
     77
     78			duart: serial@80070000 {
     79				pinctrl-names = "default";
     80				pinctrl-0 = <&duart_pins_a>;
     81				status = "okay";
     82			};
     83
     84			auart0: serial@8006c000 {
     85				pinctrl-names = "default";
     86				pinctrl-0 = <&auart0_2pins_a>;
     87				status = "okay";
     88			};
     89
     90			usbphy0: usbphy@8007c000 {
     91				status = "okay";
     92			};
     93		};
     94	};
     95
     96	ahb@80080000 {
     97		usb0: usb@80080000 {
     98			dr_mode = "host";
     99			vbus-supply = <&reg_usb0_vbus>;
    100			status = "okay";
    101		};
    102	};
    103
    104	regulators {
    105		compatible = "simple-bus";
    106		#address-cells = <1>;
    107		#size-cells = <0>;
    108
    109		reg_usb0_vbus: regulator@0 {
    110			compatible = "regulator-fixed";
    111			reg = <0>;
    112			regulator-name = "usb0_vbus";
    113			regulator-min-microvolt = <5000000>;
    114			regulator-max-microvolt = <5000000>;
    115			enable-active-high;
    116			startup-delay-us = <300>; /* LAN9215 requires a POR of 200us minimum */
    117			gpio = <&gpio0 17 0>;
    118		};
    119	};
    120
    121	leds {
    122		compatible = "gpio-leds";
    123		pinctrl-names = "default";
    124		pinctrl-0 = <&led_pin_gpio2_1>;
    125
    126		user {
    127			label = "green";
    128			gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
    129		};
    130	};
    131};