cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts (1453B)


      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
      4 */
      5
      6#include "imx25-eukrea-mbimxsd25-baseboard.dts"
      7
      8/ {
      9	model = "Eukrea MBIMXSD25 with the CMO-QVGA Display";
     10	compatible = "eukrea,mbimxsd25-baseboard-cmo-qvga", "eukrea,mbimxsd25-baseboard", "eukrea,cpuimx25", "fsl,imx25";
     11
     12	cmo_qvga: display {
     13		model = "CMO-QVGA";
     14		bits-per-pixel = <16>;
     15		fsl,pcr = <0xcad08b80>;
     16		bus-width = <18>;
     17		display-timings {
     18			native-mode = <&qvga_timings>;
     19			qvga_timings: 320x240 {
     20				clock-frequency = <6500000>;
     21				hactive = <320>;
     22				vactive = <240>;
     23				hback-porch = <30>;
     24				hfront-porch = <38>;
     25				vback-porch = <20>;
     26				vfront-porch = <3>;
     27				hsync-len = <15>;
     28				vsync-len = <4>;
     29			};
     30		};
     31	};
     32
     33	regulators {
     34		compatible = "simple-bus";
     35		#address-cells = <1>;
     36		#size-cells = <0>;
     37
     38		reg_lcd_3v3: regulator@0 {
     39			compatible = "regulator-fixed";
     40			reg = <0>;
     41			pinctrl-names = "default";
     42			pinctrl-0 = <&pinctrl_reg_lcd_3v3>;
     43			regulator-name = "lcd-3v3";
     44			regulator-min-microvolt = <3300000>;
     45			regulator-max-microvolt = <3300000>;
     46			gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
     47			enable-active-high;
     48		};
     49	};
     50};
     51
     52&iomuxc {
     53	imx25-eukrea-mbimxsd25-baseboard-cmo-qvga {
     54		pinctrl_reg_lcd_3v3: reg_lcd_3v3 {
     55			fsl,pins = <MX25_PAD_PWM__GPIO_1_26 0x80000000>;
     56		};
     57	};
     58};
     59
     60&lcdc {
     61	display = <&cmo_qvga>;
     62	fsl,lpccr = <0x00a903ff>;
     63	lcd-supply = <&reg_lcd_3v3>;
     64	status = "okay";
     65};